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Author SHA1 Message Date
dvab-sarma
8b7d53a27b [PATCH v4 1/3] PCI: dw-rockchip: Remove PCIE_L0S_ENTRY check from rockchip_pcie_link_up()
Date: Thu, 17 Apr 2025 08:35:09 +0800	[thread overview]
Message-ID: <1744850111-236269-1-git-send-email-shawn.lin@rock-chips.com> (raw)

Two mistakes here:
1. 0x11 is L0 not L0S, so the naming is wrong from the very beginning.
2. It's totally broken if enabling ASPM as rockchip_pcie_link_up() treat
other states, for instance, L0S or L1 as link down which is obviously
wrong.

Remove the check.

Fixes: 0e898eb8df4e ("PCI: rockchip-dwc: Add Rockchip RK356X host controller driver")
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Reviewed-by: Niklas Cassel <cassel@kernel.org>
2025-12-11 03:53:20 -06:00
dvab-sarma
7e144d9afa can be used for AOSP 15 & 16 2025-06-27 00:32:42 -05:00