212786 commits

This branch

This branch

All branches

Author	SHA1	Message	Date
Brendan Szymanski	c6120c0e4d	Remove remaining bi_opcodes_h_gen references from gallium driver	2026-07-11 12:35:54 -04:00
Brendan Szymanski	9440e9dcc9	Remove Python codegen genrules that fail in Soong sandbox ... The panfrost compiler code gen tools (bi_opcodes, bi_packer, etc.) import local Python modules (bifrost_isa) which aren't resolvable inside Soong's sbox sandbox. Use pre-generated meson_generated files instead. Keep genxml genrules which are self-contained. Copyright (C) 2026 Brendan Szymanski <hello@bscubed.dev>	2026-07-11 12:35:06 -04:00
Brendan Szymanski	b78a113299	Remove model include dir from top-level vulkan.panfrost	2026-07-11 11:29:07 -04:00
Brendan Szymanski	16c5bceb2a	Remove non-existent model include dir from per-arch vulkan modules	2026-07-11 10:56:16 -04:00
Brendan Szymanski	4f689efaa8	Fix local_include_dirs paths for per-arch vulkan modules	2026-07-11 10:55:07 -04:00
Brendan Szymanski	b0494e1135	Fix local_include_dirs for distributed Android.bp paths	2026-07-11 10:53:33 -04:00
Brendan Szymanski	51731b681b	Rename .h.py/.c.py files to _h.py/_c.py to avoid Soong subpath parsing	2026-07-11 10:52:16 -04:00
Brendan Szymanski	5177449819	Fix perf module include path and remove host_supported	2026-07-11 10:51:10 -04:00
Brendan Szymanski	bc627d48f5	Remove panfrost_model dependency from vulkan.panfrost	2026-07-11 10:50:15 -04:00
Brendan Szymanski	c75e21a867	Fix missing source files and meson_generated paths ... - Copy meson_generated from dvab-sarma's fork for genxml, libpan, perf, vulkan - Remove panfrost_model module (model/ directory doesn't exist in 25.0.4) - Remove panvk_android.c and panvk_device.c from vulkan.panfrost (not in 25.0.4) - Remove avalon/panvk_vX_meta_desc_copy.c from per-arch vulkan (not in 25.0.4) - Fix meson_generated path references for distributed Android.bp structure Copyright (C) 2026 Brendan Szymanski <hello@bscubed.dev>	2026-07-11 10:49:31 -04:00
Brendan Szymanski	a9bb56ccad	Remove host_supported from Android-only shared library modules ... libgallium_dri, libEGL_mesa, libgbm_mesa, and dri_gbm depend on Android-only shared libraries (libnativewindow, libsync) which don't have host (linux_glibc) variants. Removing host_supported restricts these modules to Android targets only. Copyright (C) 2026 Brendan Szymanski <hello@bscubed.dev>	2026-07-10 23:30:33 -04:00
Brendan Szymanski	53d864b45d	Fix genrule cmd syntax: escape dollar paren for Soong ... Soong interprets $(...) as variable references. dirname was being parsed as an unknown variable. Escape to $$(...) to pass it through to the shell as a literal dirname command. Copyright (C) 2026 Brendan Szymanski <hello@bscubed.dev>	2026-07-10 23:28:16 -04:00
Brendan Szymanski	e23fdcbdfe	Apply RK3588 compatibility patches to EGL and PanVK ... - EGL: 64-bit gralloc usage, API level guard removal, buffer dequeue optimization - PanVK: SHA1 cache UUID, legacy scanout LINEAR default Copyright (C) 2026 Brendan Szymanski <hello@bscubed.dev>	2026-07-10 22:40:41 -04:00
Brendan Szymanski	2162a00496	Add Vulkan Panfrost APEX packaging for Orange Pi 5 Ultra ... Copyright (C) 2026 Brendan Szymanski <hello@bscubed.dev>	2026-07-10 22:36:53 -04:00
Brendan Szymanski	39090840e0	Add Panfrost build rules for Orange Pi 5 Ultra ... Define Soong modules for Panfrost gallium driver, PanVK, EGL, GLES, GBM, and DRI loader. Copyright (C) 2026 Brendan Szymanski <hello@bscubed.dev>	2026-07-10 22:28:21 -04:00
Android Build Coastguard Worker	d4b6f1eba2	Snap for 14095642 from 75941391f3 to 25Q4-release ... Change-Id: Id2a63cb2133c1ccabaea79486bb0e7ecf8e1889f	2025-09-12 18:10:29 -07:00
Cole Faust	75941391f3	Remove python version properties ... Python2 has been deleted, only python3 exists in the build now. Cleanup version-specific python properties. Also remove any embedded_launcher: true lines, as that is the default now. Bug: 203436762 Test: Presubmits Flag: EXEMPT PURE_REFACTOR Change-Id: If72abda65b39f7f615e36724ca43eaa89fb82798	2025-09-11 10:50:36 -07:00
Android Build Coastguard Worker	cf2bdedb17	Snap for 14040641 from 2ac7983946 to 25Q4-release ... Change-Id: Ib1477a609dfcd70ece35d7af1008ae192c06d1f6	2025-09-03 16:10:50 -07:00
Jason Macnak	2ac7983946	Address some Werror errors from ag/35389434 ... Bug: n/a Test: github CI Change-Id: I2622b9efce5a66a387d7835894c8ba53f932599a	2025-09-02 14:19:35 -07:00
Android Build Coastguard Worker	f0981471e9	Snap for 14019536 from 596b781dc2 to 25Q4-release ... Change-Id: Ie0610a22cb2bfedbb262f5e75992505d233adb3d	2025-08-29 18:39:02 -07:00
Serdar Kocdemir	596b781dc2	Merge "Enable VK_MVK_macos_surface for host dispatch" into main	2025-08-29 09:12:09 -07:00
Serdar Kocdemir	f3af075b34	Enable VK_MVK_macos_surface for host dispatch ... To be used in Vulkan composition on macOS. Bug: 389646068 Test: -feature GuestAngle, VulkanNativeSwapchain Change-Id: I7f7d67b56f89277da1ed61852c96b99dc0cce26d	2025-08-26 15:31:50 +01:00
Android Build Coastguard Worker	1a6ddadd9e	Snap for 13989311 from ee57f856c8 to 25Q4-release ... Change-Id: Ifd907c3c04aa7e56a32cb701f75a4918cddd29b9	2025-08-25 16:51:44 -07:00
Android Build Coastguard Worker	1e6761549c	Snap for 13982012 from 445f0731c2 to 25Q4-release ... Change-Id: I78f62d7d089d06e5998117423bdec52c9867536c	2025-08-22 18:15:26 -07:00
Jason Macnak	ee57f856c8	Enable perfetto in mesa targets ... Bug: b/440065361 Test: Capture guest and host trace and inspect in perfetto UI Change-Id: Icad207776552f5b06398ee58872cfe85ef4eb2fc	2025-08-22 20:35:44 +00:00
Matt Turner	e75c61c62d	UPSTREAM: meson: Allow configuring with Android-internal perfetto ... This enables ninja-to-soong to generate an Android.bp that builds Mesa against Android's `libperfetto_client_experimental` library. Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36561> Change-Id: I14f43cfeb6e163fb0de7098b0131541a0df05109	2025-08-22 20:20:57 +00:00
Matt Turner	0526c2ae77	UPSTREAM: meson: Allow controlling perfetto fallback ... Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36561> Change-Id: Iacf85a6d70f65910af109d61ad18e333f1fea663	2025-08-22 20:20:51 +00:00
Android Build Coastguard Worker	d28630a384	Snap for 13972532 from d4c765611b to 25Q4-release ... Change-Id: I3a44bb3ef202b6b857a63525a67d9e3b2b87f334	2025-08-21 16:32:21 -07:00
Jason Macnak	445f0731c2	Hide vkTraceAsyncGOOGLE behind new capset flag ... ... to make it forward compatible / to make it not crash older Gfxstream host builds. Bug: b/440065361 Test: Capture guest and host trace and inspect in perfetto UI Change-Id: I5f0d0618f208de5728c21eb72cfee8112e535e64	2025-08-21 19:38:02 +00:00
Jason Macnak	d4c765611b	Add a vkTraceAsyncGOOGLE ... ... to allow sharing perfetto global flow ids between guest and host so that combined traces can have an arrow between the guest and host render threads to aid debugging. Bug: b/440065361 Test: Capture guest and host trace and inspect in perfetto UI Change-Id: Ib4ce85fd48cf20d06ff88d8cda54fb4143e28569	2025-08-20 20:10:39 +00:00
Android Build Coastguard Worker	486e181aba	Snap for 13937020 from a110af6a34 to 25Q4-release ... Change-Id: If9b975f9dbd548bdda51580b0fae9286740738d4	2025-08-14 16:20:57 -07:00
sergiuferentz	a110af6a34	VirtGpuDevice can be null for Goldfish. ... Test: atest CtsDeqpTestCases -- --module-arg 'CtsDeqpTestCases:include-filter:dEQP-VK.image.swapchain_mutable.android.2d*' Bug: 438487556 Change-Id: I4a740fbb223e0987a1d0b86f7efe47f09267b65b	2025-08-14 15:14:04 +01:00
Android Build Coastguard Worker	9bb13d585d	Snap for 13921250 from 055a8b5a05 to 25Q4-release ... Change-Id: I7dc744cefdab9fde24c6f969240148c4c541a4a6	2025-08-12 16:13:18 -07:00
Bo Hu	055a8b5a05	[vulkan snapshot]: update code gen for vkUpdateDescriptorSet change ... Bug: 417788798 Change-Id: I2d90247125efc152855c25f620428a100c98eb04	2025-08-05 22:34:57 -07:00
Android Build Coastguard Worker	b694085090	Snap for 13886633 from 648199ae76 to 25Q4-release ... Change-Id: I9920f7e0157af248d199dfe4b2329c579a6b7db3	2025-08-05 16:13:48 -07:00
Gurchetan Singh	648199ae76	Merge remote-tracking branch 'goog/upstream-main' into HEAD ... Mesa merge, August 1 2025. BUG=none TEST=CI/CD Change-Id: I8fb9e42a6bcda66a342e512b953deb5454e58385	2025-08-01 14:05:32 -07:00
Georg Lehmann	cfd5fbfde1	nir/opt_algebraic: make fmin/fmax(a, #b) 16bit if only used by f2f16 ... Foz-DB Navi31: Totals from 11 out of 14 FSR4 shaders: Instrs: 58298 -> 58374 (+0.13%); split: -0.08%, +0.21% CodeSize: 397836 -> 398108 (+0.07%); split: -0.08%, +0.15% Latency: 209634 -> 211438 (+0.86%); split: -0.14%, +1.00% InvThroughput: 229152 -> 229314 (+0.07%); split: -0.03%, +0.10% VClause: 826 -> 847 (+2.54%); split: -0.36%, +2.91% Copies: 2954 -> 3040 (+2.91%); split: -1.56%, +4.47% VALU: 49637 -> 49711 (+0.15%); split: -0.06%, +0.21% VOPD: 1916 -> 1400 (-26.93%) These stats looks bad, but it's actually just unlucky RA. Replacing 1 VOPD (two v_dual_max_f32) with 1 VOP3P (v_pk_max_f16) should still be a win from a register bandwidth perspective. Reviewed-by: Marek Olšák <marek.olsak@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36468>	2025-08-01 20:29:30 +00:00
Georg Lehmann	3168ebe2c5	nir/range_analysis: look through vec2 ... Foz-DB Navi31: Totals from 11 out of 14 FSR4 shaders: Instrs: 58987 -> 58298 (-1.17%) CodeSize: 402844 -> 397836 (-1.24%) Latency: 209630 -> 209634 (+0.00%); split: -0.66%, +0.66% InvThroughput: 230240 -> 229152 (-0.47%); split: -0.48%, +0.00% VClause: 838 -> 826 (-1.43%); split: -1.55%, +0.12% Copies: 3019 -> 2954 (-2.15%); split: -2.82%, +0.66% VALU: 50196 -> 49637 (-1.11%) VOPD: 1950 -> 1916 (-1.74%); split: +0.72%, -2.46% Reviewed-by: Emma Anholt <emma@anholt.net> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36468>	2025-08-01 20:29:29 +00:00
Georg Lehmann	caf89c97de	nir/range_analysis: look through f2f ... Foz-DB Navi31: Totals from 93 (0.12% of 80273) affected shaders: Instrs: 123927 -> 121073 (-2.30%); split: -2.30%, +0.00% CodeSize: 670832 -> 653332 (-2.61%); split: -2.61%, +0.00% Latency: 337678 -> 322803 (-4.41%); split: -4.41%, +0.00% InvThroughput: 63277 -> 61083 (-3.47%) VClause: 460 -> 373 (-18.91%) SClause: 2178 -> 2100 (-3.58%) Copies: 7637 -> 7744 (+1.40%) PreSGPRs: 4414 -> 4287 (-2.88%) PreVGPRs: 4229 -> 4230 (+0.02%) VALU: 77375 -> 75693 (-2.17%) SALU: 16497 -> 16383 (-0.69%); split: -0.73%, +0.04% VMEM: 561 -> 477 (-14.97%) SMEM: 3197 -> 3113 (-2.63%) Reviewed-by: Emma Anholt <emma@anholt.net> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36468>	2025-08-01 20:29:28 +00:00
Georg Lehmann	261239a492	nir/opt_algebraic: use range analysis to detect no-op fmin/fmax ... Foz-DB Navi31: Totals from 418 (0.52% of 80273) affected shaders: Instrs: 564550 -> 564387 (-0.03%); split: -0.04%, +0.01% CodeSize: 2983860 -> 2982684 (-0.04%); split: -0.05%, +0.01% Latency: 4387264 -> 4386397 (-0.02%); split: -0.02%, +0.00% InvThroughput: 717464 -> 716874 (-0.08%); split: -0.08%, +0.00% Copies: 40126 -> 40125 (-0.00%) VALU: 352128 -> 352003 (-0.04%); split: -0.04%, +0.01% SALU: 50290 -> 50283 (-0.01%) Reviewed-by: Marek Olšák <marek.olsak@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36468>	2025-08-01 20:29:28 +00:00
Georg Lehmann	a0665e79e9	nir/opt_algebraic: push fsat into bcsel with constant ... bcsel doesn't have a free clamp modifier on AMD hardware, but what's inside might have free clamp. Foz-DB Navi31: Totals from 873 (1.09% of 80273) affected shaders: MaxWaves: 22008 -> 21968 (-0.18%) Instrs: 4624956 -> 4623950 (-0.02%); split: -0.04%, +0.02% CodeSize: 24152780 -> 24142884 (-0.04%); split: -0.05%, +0.01% VGPRs: 57900 -> 57960 (+0.10%) Latency: 28762622 -> 28749889 (-0.04%); split: -0.06%, +0.02% InvThroughput: 5320810 -> 5320145 (-0.01%); split: -0.02%, +0.00% VClause: 115879 -> 115929 (+0.04%); split: -0.10%, +0.14% SClause: 93058 -> 93059 (+0.00%); split: -0.01%, +0.02% Copies: 335674 -> 335845 (+0.05%); split: -0.05%, +0.10% PreSGPRs: 53819 -> 53843 (+0.04%); split: -0.01%, +0.05% PreVGPRs: 50908 -> 50939 (+0.06%); split: -0.02%, +0.08% VALU: 2816395 -> 2815514 (-0.03%); split: -0.04%, +0.01% SALU: 509988 -> 509987 (-0.00%); split: -0.02%, +0.02% Reviewed-by: Marek Olšák <marek.olsak@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36468>	2025-08-01 20:29:27 +00:00
Georg Lehmann	e9e5146848	nir/opt_algebraic: optimize fsat(fmax(a, b)) where b is not positive ... Foz-DB Navi31: Totals from 946 (1.18% of 80273) affected shaders: Instrs: 4986082 -> 4983988 (-0.04%); split: -0.04%, +0.00% CodeSize: 25998700 -> 25989796 (-0.03%); split: -0.04%, +0.00% Latency: 45514742 -> 45510330 (-0.01%); split: -0.01%, +0.00% InvThroughput: 8163529 -> 8162325 (-0.01%); split: -0.02%, +0.00% VClause: 112105 -> 112104 (-0.00%); split: -0.00%, +0.00% SClause: 109694 -> 109688 (-0.01%) Copies: 372356 -> 372284 (-0.02%); split: -0.03%, +0.01% Branches: 132636 -> 132633 (-0.00%) PreVGPRs: 58997 -> 58979 (-0.03%); split: -0.03%, +0.00% VALU: 3025662 -> 3024191 (-0.05%); split: -0.05%, +0.00% SALU: 551712 -> 551714 (+0.00%); split: -0.00%, +0.00% Reviewed-by: Marek Olšák <marek.olsak@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36468>	2025-08-01 20:29:27 +00:00
Rob Clark	898fa317dd	util: Optimize MESA_TRACE_FUNC() ... Avoiding the vsnprintf speeds up drawoverhead -test 3 by 60+% !! Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36492>	2025-08-01 19:58:24 +00:00
Rob Clark	b833bb2df4	freedreno/registers: Fix DBGC_CFG_DBGBUS_SEL_D definition ... Offset is the same, but bitfields change between a6xx and a7xx. Syncing the change from https://patchwork.freedesktop.org/series/152200/ Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36426>	2025-08-01 19:33:28 +00:00
Rob Clark	a05b6e293c	freedreno/crashdec: Add option to export a snapshot ... Add support to convert into the "snapshot" format used by internal tooling. Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36426>	2025-08-01 19:33:28 +00:00
Rob Clark	08b9d771e3	freedreno/crashdec: Sanitize index-regs section names ... Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36426>	2025-08-01 19:33:28 +00:00
Rob Clark	d8840db682	freedreno/decode: Add enum value decoding ... Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36426>	2025-08-01 19:33:27 +00:00
Job Noorman	c8f9990733	ir3/legalize: prevent infinite loop when inserting (ss)nop ... We need to insert a (ss)nop when an instruction that doesn't support (ss) needs it. However, when this happens in a block that needs to be legalized more than once (e.g., because it is in a loop), the (ss)nop would be inserted every iteration, causing an infinite loop. Fix this by checking if the previous instructions is a nop and applying (ss) there. Signed-off-by: Job Noorman <jnoorman@igalia.com> Fixes: 5993723471 ("freedreno/a3xx/compiler: scheduling/legalize fixes") Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36440>	2025-08-01 19:08:23 +00:00
Paulo Zanoni	257e1515e3	brw: null-tile sends don't need to skip L3 on Xe2 and newer ... Despite the information in "Overview of Memory Access" (57046), the L3 seems to be smarter on Xe2+. See 4aa3b2d3ad ("anv: LNL+ doesn't need the special flush for sparse"). The behavior is the same both with vm_bind and TR-TT. v2: Add some comments (Caio). Reviewed-by: Caio Oliveira <caio.oliveira@intel.com> Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36150>	2025-08-01 18:47:37 +00:00
Paulo Zanoni	80f01c03ba	brw: remove unnecessary casts to unsigned after calling LSC_CACHE() ... The macro already casts the values to unsigned. Reviewed-by: Caio Oliveira <caio.oliveira@intel.com> Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36150>	2025-08-01 18:47:37 +00:00