diff --git a/Android.bp b/Android.bp new file mode 100644 index 0000000..9515b25 --- /dev/null +++ b/Android.bp @@ -0,0 +1,2 @@ +soong_namespace { +} diff --git a/Android.mk b/Android.mk new file mode 100644 index 0000000..7911f61 --- /dev/null +++ b/Android.mk @@ -0,0 +1 @@ +LOCAL_PATH := $(call my-dir) diff --git a/BoardConfigVendor.mk b/BoardConfigVendor.mk new file mode 100644 index 0000000..d4858f9 --- /dev/null +++ b/BoardConfigVendor.mk @@ -0,0 +1 @@ +# Vendor prebuilt board configuration diff --git a/README.md b/README.md index a3edcbb..e77ddbd 100644 --- a/README.md +++ b/README.md @@ -1 +1,44 @@ -# proprietary_vendor_lineage-rockchip +# Vendor Blobs — Orange Pi 5 Ultra (Rockchip RK3588) + +Proprietary firmware and vendor configuration for the Orange Pi 5 Ultra. + +## Contents + +### GPU Firmware +| File | Description | +|------|-------------| +| `arm/mali/arch10.8/mali_csffw.bin` | Mali-G610 (Valhall) command stream firmware for Panfrost | + +### WiFi/BT Firmware (Synaptics SYN43711 / Ampak AP6611S) +| File | Description | +|------|-------------| +| `brcm/fw_syn43711a0_sdio.bin` | WiFi 6E firmware (SDIO) | +| `brcm/clm_syn43711a0.blob` | Country Locale Matrix (regulatory calibration) | +| `brcm/SYN43711A0.hcd` | Bluetooth 5.3 firmware | +| `brcm/nvram_ap6611s.txt` | WiFi NVRAM config (generic) | +| `brcm/nvram_ap6611s.txt-orangepi5ultra` | WiFi NVRAM config (Orange Pi 5 Ultra specific) | + +### Regulatory Database +| File | Description | +|------|-------------| +| `regulatory.db` | CRDA wireless regulatory database | +| `regulatory.db.p7s` | PKCS#7 signed regulatory data | + +## Build Files + +| File | Purpose | +|------|---------| +| `opi5ultra-vendor.mk` | Vendor makefile (inherited by device tree) | +| `Android.bp` | Soong namespace definition | +| `Android.mk` | Make include | +| `BoardConfigVendor.mk` | Vendor board config | + +## Sources + +- **Mali firmware:** From mainline linux-firmware (arch10.8 = Mali Valhall G610) +- **WiFi/BT firmware:** From [orangepi-xunlong/firmware](https://github.com/orangepi-xunlong/firmware) (official Orange Pi firmware repository) +- **Regulatory DB:** From dvab-sarma AOSP project + +## Branch + +`lineage-23.2` — for use with LineageOS 23.2 (Android 16). diff --git a/opi5ultra-vendor.mk b/opi5ultra-vendor.mk new file mode 100644 index 0000000..67c4d60 --- /dev/null +++ b/opi5ultra-vendor.mk @@ -0,0 +1,17 @@ +# Orange Pi 5 Ultra vendor configuration +# +# Provides firmware blobs and vendor makefile for the Orange Pi 5 Ultra. +# Inherited by device/rockchip/orangepi5ultra/device.mk. + +PRODUCT_SOONG_NAMESPACES += \ + vendor/lineage-rockchip + +PRODUCT_COPY_FILES += \ + vendor/lineage-rockchip/proprietary/vendor/firmware/arm/mali/arch10.8/mali_csffw.bin:$(TARGET_COPY_OUT_VENDOR)/firmware/arm/mali/arch10.8/mali_csffw.bin \ + vendor/lineage-rockchip/proprietary/vendor/firmware/regulatory.db:$(TARGET_COPY_OUT_VENDOR)/firmware/regulatory.db \ + vendor/lineage-rockchip/proprietary/vendor/firmware/regulatory.db.p7s:$(TARGET_COPY_OUT_VENDOR)/firmware/regulatory.db.p7s \ + vendor/lineage-rockchip/proprietary/vendor/firmware/brcm/fw_syn43711a0_sdio.bin:$(TARGET_COPY_OUT_VENDOR)/firmware/brcm/fw_syn43711a0_sdio.bin \ + vendor/lineage-rockchip/proprietary/vendor/firmware/brcm/clm_syn43711a0.blob:$(TARGET_COPY_OUT_VENDOR)/firmware/brcm/clm_syn43711a0.blob \ + vendor/lineage-rockchip/proprietary/vendor/firmware/brcm/SYN43711A0.hcd:$(TARGET_COPY_OUT_VENDOR)/firmware/brcm/SYN43711A0.hcd \ + vendor/lineage-rockchip/proprietary/vendor/firmware/brcm/nvram_ap6611s.txt:$(TARGET_COPY_OUT_VENDOR)/firmware/brcm/nvram_ap6611s.txt \ + vendor/lineage-rockchip/proprietary/vendor/firmware/brcm/nvram_ap6611s.txt-orangepi5ultra:$(TARGET_COPY_OUT_VENDOR)/firmware/brcm/nvram_ap6611s.txt-orangepi5ultra diff --git a/proprietary/vendor/firmware/arm/mali/arch10.8/mali_csffw.bin b/proprietary/vendor/firmware/arm/mali/arch10.8/mali_csffw.bin new file mode 100644 index 0000000..9c2a972 Binary files /dev/null and b/proprietary/vendor/firmware/arm/mali/arch10.8/mali_csffw.bin differ diff --git a/proprietary/vendor/firmware/brcm/SYN43711A0.hcd b/proprietary/vendor/firmware/brcm/SYN43711A0.hcd new file mode 100644 index 0000000..5338a61 Binary files /dev/null and b/proprietary/vendor/firmware/brcm/SYN43711A0.hcd differ diff --git a/proprietary/vendor/firmware/brcm/clm_syn43711a0.blob b/proprietary/vendor/firmware/brcm/clm_syn43711a0.blob new file mode 100644 index 0000000..1d981c1 Binary files /dev/null and b/proprietary/vendor/firmware/brcm/clm_syn43711a0.blob differ diff --git a/proprietary/vendor/firmware/brcm/fw_syn43711a0_sdio.bin b/proprietary/vendor/firmware/brcm/fw_syn43711a0_sdio.bin new file mode 100644 index 0000000..014a726 Binary files /dev/null and b/proprietary/vendor/firmware/brcm/fw_syn43711a0_sdio.bin differ diff --git a/proprietary/vendor/firmware/brcm/nvram_ap6611s.txt b/proprietary/vendor/firmware/brcm/nvram_ap6611s.txt new file mode 100644 index 0000000..306bf0f --- /dev/null +++ b/proprietary/vendor/firmware/brcm/nvram_ap6611s.txt @@ -0,0 +1,301 @@ +# AP6611S_NVRAM_V0.1_20231016 +# syn43711 WLBGA SDIO reference board, iPA/iLNA version +# nvram copied and edited from syn943711wlpagbi_p100 // +# syn943711wlsagbil_p100.txt +# +# ********************SUMMARY******************** +# Board Name: syn943711wlsagbil_p100 +# SSID: 0x0a74 +# macmid:0x02df +# ************************************************* +# $ Copyright Synaptics $ +# <> + +NVRAMRev=$Rev: 874188 $ +sromrev=11 +boardrev=0x1100 +boardtype=0x0a74 +boardflags=0x00400001 +boardflags2=0xc0800000 +boardflags3=0x40002180 +#boardnum=57410 +macaddr=00:90:4c:12:d0:01 +jtag_irw=38 + +# Regulatory specific +ccode=0 +regrev=0 + +# Ant related +aa2g=1 +aa5g=1 +agbg0=0 +aga0=0 +ag6ga0=0 + +# Feature flags +subband5gver=0x4 +subband6gver=0x1 + +# Board specific +vendid=0x14e4 +devid=0x44b0 +manfid=0x2d0 +antswitch=0 +pdgain5g=0 +pdgain2g=0 + +# RX gain related +rxgains2gelnagaina0=0 +rxgains2gtrisoa0=0 +rxgains2gtrelnabypa0=0 +rxgains5gelnagaina0=0 +rxgains5gtrisoa0=0 +rxgains5gtrelnabypa0=0 +rxgains5gmelnagaina0=0 +rxgains5gmtrisoa0=0 +rxgains5gmtrelnabypa0=0 +rxgains5ghelnagaina0=0 +rxgains5ghtrisoa0=0 +rxgains5ghtrelnabypa0=0 + +# RSSI related +rssicorrnorm_c0=7,7 +rssicorrnorm5g_c0=6,6,6,6,5,6,7,5,5,7,5,6 + +# TSSI related +extpagain2g=2 +extpagain5g=2 +tssipos2g=1 +tssipos5g=1 +tworangetssi2g=0 +tworangetssi5g=0 +lowpowerrange2g=0 +lowpowerrange5g=0 +low_adc_rate_en=1 +paparambwver=3 +AvVmid_c0=2,127,4,92,4,91,4,91,4,94 +AvVmid_6g_c0=4,94,4,94,4,94,4,94,4,94,4,94 + +# PA parameters +pa2gccka0=78,12527,-1325 +pa2ga0=54,9951,-1012 +pa5ga0=1,7721,-806,22,7818,-796,-77,7151,-795,-80,7154,-792 +pa6ga0=-98,6920,-775,-81,7043,-783,-89,7040,-789,-83,7048,-786,-52,7212,-782,72,7911,-761 + +# MISC Core related +bandcap=7 +txchain=1 +rxchain=1 +nocrc=1 +otpimagesize=502 +xtalfreq=37400 +cckdigfilttype=2 + +# rpcal coef for imptxbf +rpcal5gb0=238 +rpcal5gb1=228 +rpcal5gb2=222 +rpcal5gb3=229 +rpcal2g=15 + +# Tempsense Related +tempthresh=255 +tempoffset=40 +rawtempsense=0x1ff +phycal_tempdelta=15 +temps_period=15 +temps_hysteresis=15 + +# Max power and offsets +maxp2ga0=88 +maxp5ga0=71,70,70,70 +cckpwroffset0=2 +powoffs2gtna0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 +pdoffset40ma0=0x5256 +pdoffset80ma0=0x6655 +pdoffset6g40ma0=0x444444 +pdoffset6g80ma0=0x555555 + +# HWOLPC +disable_olpc=0 +olpc_thresh2g=44 +olpc_anchor2g=52 +olpc_thresh5g=44 +olpc_anchor5g=52 +olpc_thresh6g=40 +olpc_anchor6g=48 +hwolpc_offset_c0=2,-2,-6,-6,-6 +hwolpc_offset6g_c0=-6,-4,-5,-5,-6,-5 + +# 5G power offset per channel for band edge channel +powoffs5g20mtna0=0,0,0,0,0,0,0 +powoffs5g40mtna0=0,0,0,0,0 +powoffs5g80mtna0=0,0,0,0,0 +mcs11poexp=0 + +# 2G/5G SU Power Per Rate +cckbw202gpo=0X2222 +cckbw20ul2gpo=0X2222 +mcsbw202gpo=0xA9886433 +mcsbw402gpo=0x44000000 +dot11agofdmhrbw202gpo=0x7755 +ofdmlrbw202gpo=0x0022 +mcsbw205glpo=0x87421111 +mcsbw405glpo=0xA8421111 +mcsbw805glpo=0xA8421111 +mcsbw205gmpo=0x87421111 +mcsbw405gmpo=0xCA422222 +mcsbw805gmpo=0xA8421111 +mcsbw205ghpo=0x87421111 +mcsbw405ghpo=0xCA422222 +mcsbw805ghpo=0x98421111 +mcs1024qam2gpo=0x7777 +mcs1024qam5glpo=0xFFDDDD +mcs1024qam5gmpo=0xFFFFFF +mcs1024qam5ghpo=0xFFFFFF +mcs1024qam5gx1po=0xFFFFFF +mcs1024qam5gx2po=0xFFFFFF +mcs8poexp=0 +mcs9poexp=0 +mcs10poexp=0 + +# 6G SU Power Per Rate +maxp6ga0=76,76,76,76,76,70 +mcsbw206gb1po=0xEA855555 +mcsbw406gb1po=0xEA855555 +mcsbw806gb1po=0xE9652222 +mcsbw206gb2po=0xEA855555 +mcsbw406gb2po=0xEA855555 +mcsbw806gb2po=0xE9652222 +mcsbw206gb3po=0xEA855555 +mcsbw406gb3po=0xEA855555 +mcsbw806gb3po=0xE9652222 +mcsbw206gb4po=0xEA855555 +mcsbw406gb4po=0xEA855555 +mcsbw806gb4po=0xE9652222 +mcsbw206gb5po=0xEA855555 +mcsbw406gb5po=0xEA855555 +mcsbw806gb5po=0xE9652222 +mcsbw206gb6po=0xCA964444 +mcsbw406gb6po=0xBA633333 +mcsbw806gb6po=0xE9652221 +mcs1024qam6gb1po=0xFFFFFF +mcs1024qam6gb2po=0xFFFFFF +mcs1024qam6gb3po=0xFFFFFF +mcs1024qam6gb4po=0xFFFFFF +mcs1024qam6gb5po=0xFFFFFF +mcs1024qam6gb6po=0xFFFFFF + +#OOB params +#device_wake_opt=1 +host_wake_opt=0 +muxenab=0x10 + +#SWCTRL Related +swctrlmap_2g=0x00000010,0x00000004,0x00000010,0x000000,0x3FF +swctrlmapext_2g=0x00000000,0x00000000,0x00000000,0x000000,0x000 +swctrlmap_5g=0x00000002,0x00000008,0x00000002,0x000000,0x3FF +swctrlmapext_5g=0x00000000,0x00000000,0x00000000,0x000000,0x000 +swctrlmap_6g=0x00000002,0x00000008,0x00000002,0x000000,0x3FF +swctrlmapext_6g=0x00000000,0x00000000,0x00000000,0x000000,0x000 +clb2gslice0core0=0x014 +clb2gslice1core0=0x000 +clb5gslice0core0=0xA +clb5gslice1core0=0x000 + +#BT Coex +btc_mode=1 +btc_prisel_ant_mask=0x2 +clb_swctrl_smask_ant0=0x3DF +bt_coex_chdep_div=1 + +# --- PAPD Cal related params ---- +# 0:NBPAPD 1:WBPAPD +txwbpapden=0 +# NB PAPD Cal params +nb_eps_offset=470,470 +nb_bbmult=66,66 +nb_papdcalidx=30,30,21,14,26,26 +nb_txattn=2,2 +nb_rxattn=1,1 +nb_eps_stopidx=63 +epsilonoff_5g20_c0=-1,-1,1,1 +epsilonoff_5g40_c0=0,0,2,2 +epsilonoff_5g80_c0=0,0,2,2 +epsilonoff_6g20_c0=0,0,0,-1,-1,-1 +epsilonoff_6g40_c0=1,1,1,0,0,0 +epsilonoff_6g80_c0=1,0,0,0,1,0 +epsilonoff_2g20_c0=0 +epsilonoff_2g40_c0=0 + +# Enable papd for cck when target pwr ge 16dBm +cckpapd_pwrthresh=64 + +# energy detect threshold +ed_thresh2g=-67 +ed_thresh5g=-67 +ed_thresh6g=-67 + +# energy detect threshold for EU +eu_edthresh2g=-67 +eu_edthresh5g=-67 +eu_edthresh6g=-67 + +## ULOFDMA Board limit PPRs for 2G20 ## +ruppr2g20bpska0=0x0 +ruppr2g20qpska0=0x0 +ruppr2g20qam16a0=0x0 +ruppr2g20qam64a0=0x1 +ruppr2g20qam256a0=0x21084 +ruppr2g20qam1024a0=0x50000 +## ULOFDMA Board limit PPRs for 2G40 ## +ruppr2g40bpska0=0x200000 +ruppr2g40qpska0=0x200000 +ruppr2g40qam16a0=0x200000 +ruppr2g40qam64a0=0x200001 +ruppr2g40qam256a0=0x421084 +ruppr2g40qam1024a0=0xA50000 +## ULOFDMA Board limit PPRs for 5G20 ## +ruppr5g20bpska0=0x20000 +ruppr5g20qpska0=0x18000 +ruppr5g20qam16a0=0x28000 +ruppr5g20qam64a0=0x29086 +ruppr5g20qam256a0=0x62908 +ruppr5g20qam1024a0=0x70000 +## ULOFDMA Board limit PPRs for 5G40 ## +ruppr5g40bpska0=0x638000 +ruppr5g40qpska0=0x840020 +ruppr5g40qam16a0=0x638001 +ruppr5g40qam64a0=0x739085 +ruppr5g40qam256a0=0x106a108 +ruppr5g40qam1024a0=0x1078000 +## ULOFDMA Board limit PPRs for 5G80 ## +ruppr5g80bpska0=0x0 +ruppr5g80qpska0=0x0 +ruppr5g80qam16a0=0x0 +ruppr5g80qam64a0=0x187218e7 +ruppr5g80qam256a0=0x3904254a +ruppr5g80qam1024a0=0x49068000 + +## ULOFDMA Board limit PPRs for 6G20 ## +ruppr6g20bpska0=0x0 +ruppr6g20qpska0=0x0 +ruppr6g20qam16a0=0x21084 +ruppr6g20qam64a0=0x5294A +ruppr6g20qam256a0=0x6318C +ruppr6g20qam1024a0=0x94A52 +## ULOFDMA Board limit PPRs for 6G40 ## +ruppr6g40bpska0=0x0 +ruppr6g40qpska0=0x0 +ruppr6g40qam16a0=0x421084 +ruppr6g40qam64a0=0xA5294A +ruppr6g40qam256a0=0xC6318C +ruppr6g40qam1024a0=0x1294A52 +## ULOFDMA Board limit PPRs for 6G80 ## +ruppr6g80bpska0=0x0 +ruppr6g80qpska0=0x0 +ruppr6g80qam16a0=0x10421084 +ruppr6g80qam64a0=0x28A5294A +ruppr6g80qam256a0=0x30C6318C +ruppr6g80qam1024a0=0x49294A52 \ No newline at end of file diff --git a/proprietary/vendor/firmware/brcm/nvram_ap6611s.txt-orangepi5ultra b/proprietary/vendor/firmware/brcm/nvram_ap6611s.txt-orangepi5ultra new file mode 100644 index 0000000..0130a8b --- /dev/null +++ b/proprietary/vendor/firmware/brcm/nvram_ap6611s.txt-orangepi5ultra @@ -0,0 +1,375 @@ +#AP6611S_NVRAM_V1.1_20240410 +# syn43711 WLBGA SDIO reference board, iPA/iLNA version. +# nvram copied and edited from syn943711wlsagbil_p101.txt // +# syn943711wlsagbil_p200.txt +# ********************SUMMARY******************** +# Board Name: syn943711wlsagbil_p200 +# SSID: 0x0a74 +# macmid:0x02df +# ************************************************* +# $ Copyright Synaptics $ +# <> + +NVRAMRev=$Rev: 874188 $ +sromrev=11 +boardrev=0x1200 +boardtype=0x0a74 +boardflags=0x00408001 +boardflags2=0xc0800000 +boardflags3=0x40002180 +#boardnum=57410 +macaddr=00:90:4c:12:d0:01 +jtag_irw=38 + +# Regulatory specific +ccode=0 +regrev=0 + +# Ant related +aa2g=1 +aa5g=1 +agbg0=0 +aga0=0 +ag6ga0=0 + +# Feature flags +subband5gver=0x4 +subband6gver=0x1 + +# Board specific +vendid=0x14e4 +devid=0x44b0 +manfid=0x2d0 +antswitch=0 +pdgain5g=0 +pdgain2g=0 + +# RX gain related +rxgains2gelnagaina0=0 +rxgains2gtrisoa0=0 +rxgains2gtrelnabypa0=0 +rxgains5gelnagaina0=0 +rxgains5gtrisoa0=0 +rxgains5gtrelnabypa0=0 +rxgains5gmelnagaina0=0 +rxgains5gmtrisoa0=0 +rxgains5gmtrelnabypa0=0 +rxgains5ghelnagaina0=0 +rxgains5ghtrisoa0=0 +rxgains5ghtrelnabypa0=0 + +# RSSI related +#rssicorrnorm_c0=7,7 +#rssicorrnorm5g_c0=8,8,8,8,7,8,8,6,6,7,5,6 +#rssicorrnorm6g_c0=9,9,9,9,9,9,9,9,9,9,9,9,9,9,9,9,9,9 + + +# HWRSSI related +rssi_cal_rev=1 +rxgaincal_rssical=1 +gain_cal_temp=31 +rssi_cal_freq_grp_2g=0x08,0x01,0x91,0x2a,0x23,0xb3,0xc4 +rssi_delta_2gb0=8,8,8,8,4,4,4,4 +rssi_delta_2gb1=8,8,8,8,4,4,4,4 +rssi_delta_2gb2=8,8,8,8,4,4,4,4 +rssi_delta_2gb3=8,8,8,8,4,4,4,4 +rssi_delta_2gb4=8,8,8,8,4,4,4,4 +rssi_delta_5gl=18,18,18,18,16,16,16,16,18,18,18,18 +rssi_delta_5gml=12,12,12,12,12,12,12,12,10,10,10,10 +rssi_delta_5gmu=12,12,12,12,8,8,8,8,10,10,10,10 +rssi_delta_5gh=8,8,8,8,8,8,8,8,10,10,10,10 +rssi_delta_6gb0=12,12,12,12,8,8,8,8,8,8,8,8 +rssi_delta_6gb1=12,12,12,12,8,8,8,8,8,8,8,8 +rssi_delta_6gb2=12,12,12,12,8,8,8,8,8,8,8,8 +rssi_delta_6gb3=8,8,8,8,8,8,8,8,6,6,6,6 +rssi_delta_6gb4=8,8,8,8,4,4,4,4,6,6,6,6 +rssi_delta_6gb5=8,8,8,8,4,4,4,4,6,6,6,6 + +# TSSI related +extpagain2g=2 +extpagain5g=2 +tssipos2g=1 +tssipos5g=1 +tworangetssi2g=0 +tworangetssi5g=0 +lowpowerrange2g=0 +lowpowerrange5g=0 +low_adc_rate_en=1 +paparambwver=3 +AvVmid_c0=3,122,5,96,5,95,5,96,4,107 +AvVmid_6g_c0=5,102,5,93,5,96,5,94,5,104,5,105 + +# PA parameters +pa2gccka0=16,10091,-1054 + +pa2ga0=-9,8185,-834 +#pa5ga0=131,7758,-723,131,7788,-727,56,7538,-739,272,9973,-888 +#pa6ga0=319,8199,-594,182,7194,-656,20,6583,-706,-41,6607,-726,-32,6827,-734,59,7183,-708 +pa5ga0=22,7109,-707,34,7082,-694,50,7134,-694,-10,7646,-793 +pa6ga0=-46,6742,-712,-20,6801,-698,52,7040,-667,76,6985,-644,84,6887,-649,53,6815,-655 + +# MISC Core related +bandcap=7 +txchain=1 +rxchain=1 +nocrc=1 +otpimagesize=502 +xtalfreq=37400 +cckdigfilttype=2 + +# rpcal coef for imptxbf +rpcal5gb0=238 +rpcal5gb1=228 +rpcal5gb2=222 +rpcal5gb3=229 +rpcal2g=15 + +# Tempsense Related +tempthresh=255 +tempoffset=40 +rawtempsense=0x1ff +phycal_tempdelta=15 +temps_period=15 +temps_hysteresis=15 + +# Max power and offsets +maxp2ga0=85 +maxp5ga0=74,70,70,73 +cckpwroffset0=2 +powoffs2gtna0=1,0,0,0,0,0,0,0,0,0,0,0,0,0 +pdoffset40ma0=0x4442 +pdoffset80ma0=0x6442 +pdoffset6g40ma0=0x000000 +pdoffset6g80ma0=0x222222 + +# HWOLPC +disable_olpc=0 +olpc_thresh2g=40 +olpc_anchor2g=52 +olpc_thresh5g=40 +olpc_anchor5g=52 +olpc_thresh6g=40 +olpc_anchor6g=52 +hwolpc_offset_c0=1,-1,-1,-1,-1 +hwolpc_offset6g_c0=4,4,4,4,4,4 + + +# 5G power offset per channel for band edge channel +powoffs5g20mtna0=0,0,0,0,0,0,0 +powoffs5g40mtna0=0,0,0,0,0 +powoffs5g80mtna0=0,0,0,0,0 +mcs11poexp=0 + +# 2G/5G SU Power Per Rate +cckbw202gpo=0x1111 +cckbw20ul2gpo=0x1111 +mcsbw202gpo=0xba964222 +mcsbw402gpo=0xba964222 +dot11agofdmhrbw202gpo=0x5533 +ofdmlrbw202gpo=0x0011 +mcsbw205glpo=0x97422222 +mcsbw405glpo=0xB8533333 +mcsbw805glpo=0xB8533333 +mcsbw205gmpo=0x97422222 +mcsbw405gmpo=0xB8533333 +mcsbw805gmpo=0xB8533333 +mcsbw205ghpo=0x97422222 +mcsbw405ghpo=0xA8522222 +mcsbw805ghpo=0xB8522222 +mcs1024qam2gpo=0x7777 +mcs1024qam5glpo=0xFFdddd +mcs1024qam5gmpo=0xFFDDDD +mcs1024qam5ghpo=0xFFEECC +mcs1024qam5gx1po=0xFFFFFF +mcs1024qam5gx2po=0xFFFFFF +mcs8poexp=0 +mcs9poexp=0 +mcs10poexp=0 + +# 6G SU Power Per Rate +maxp6ga0=67,67,63,58,64,64 +mcsbw206gb1po=0xC8755555 +mcsbw406gb1po=0xCB966666 +mcsbw806gb1po=0xDCA55555 +mcsbw206gb2po=0xCB966666 +mcsbw406gb2po=0xCB977777 +mcsbw806gb2po=0xDCA55555 +mcsbw206gb3po=0xA9755555 +mcsbw406gb3po=0xDCA66666 +mcsbw806gb3po=0xDCA55555 +mcsbw206gb4po=0xA9744444 +mcsbw406gb4po=0xDBA66666 +mcsbw806gb4po=0xDCA55555 +mcsbw206gb5po=0xA9755555 +mcsbw406gb5po=0xDB966666 +mcsbw806gb5po=0xDCA55555 +mcsbw206gb6po=0xA9755555 +mcsbw406gb6po=0xDB666666 +mcsbw806gb6po=0xDCA55555 +mcs1024qam6gb1po=0xFFFFEE +mcs1024qam6gb2po=0xFFFFEE +mcs1024qam6gb3po=0xFFFFEE +mcs1024qam6gb4po=0xFFFFEE +mcs1024qam6gb5po=0xFFFFDD +mcs1024qam6gb6po=0xFFFFDD + +#OOB params +#device_wake_opt=1 +host_wake_opt=0 +muxenab=0x10 + +#SWCTRL Related +swctrlmap_2g=0x00000010,0x00000004,0x00000010,0x000000,0x3FF +swctrlmapext_2g=0x00000000,0x00000000,0x00000000,0x000000,0x000 +swctrlmap_5g=0x00000002,0x00000008,0x00000002,0x000000,0x3FF +swctrlmapext_5g=0x00000000,0x00000000,0x00000000,0x000000,0x000 +swctrlmap_6g=0x00000002,0x00000008,0x00000002,0x000000,0x3FF +swctrlmapext_6g=0x00000000,0x00000000,0x00000000,0x000000,0x000 +clb2gslice0core0=0x016 +clb2gslice1core0=0x000 +clb5gslice0core0=0xA +clb5gslice1core0=0x000 + + + + +#BT Coex +btc_mode=1 +btc_prisel_ant_mask=0x2 +clb_swctrl_smask_ant0=0x39e +#clb_swctrl_dmask_bt_ant0=0x2 +bt_coex_chdep_div=1 + +# --- PAPD Cal related params ---- +# 0:NBPAPD 1:WBPAPD +txwbpapden=0 +# NB PAPD Cal params +nb_eps_offset=470,470 +nb_bbmult=66,66 +nb_papdcalidx=30,30,21,14,26,26 +nb_txattn=2,2 +nb_rxattn=1,1 +nb_eps_stopidx=63 +epsilonoff_5g20_c0=-3,-3,-3,-3 +epsilonoff_5g40_c0=-3,-3,-2,-2 +epsilonoff_5g80_c0=-2,-3,-2,-2 +epsilonoff_6g20_c0=-3,-3,-3,-3,-3,-3 +epsilonoff_6g40_c0=-2,-3,-3,-3,-2,-2 +epsilonoff_6g80_c0=-1,-1,-3,-2,-1,-1 +epsilonoff_2g20_c0=-2 +epsilonoff_2g40_c0=0 + +#PAPR related +paprdis=0 +paprrmcsgamma2g=500,550,550,-1,-1,-1,-1,-1,-1,-1,-1,-1 +paprrmcsgain2g=128,128,128,0,0,0,0,0,0,0,0,0 +paprrmcsgamma2g_ch13=500,550,550,-1,-1,-1,-1,-1,-1,-1,-1,-1 +paprrmcsgain2g_ch13=128,128,128,0,0,0,0,0,0,0,0,0 +paprrmcsgamma2g_ch1=500,550,550,-1,-1,-1,-1,-1,-1,-1,-1,-1 +paprrmcsgain2g_ch1=128,128,128,0,0,0,0,0,0,0,0,0 +paprrmcsgamma5g20=500,500,500,-1,-1,-1,-1,-1,-1,-1,-1,-1 +paprrmcsgain5g20=0,0,0,0,0,0,0,0,0,0,0,0 +paprrmcsgamma5g40=600,600,600,-1,-1,-1,-1,-1,-1,-1,-1,-1 +paprrmcsgain5g40=0,0,0,0,0,0,0,0,0,0,0,0 +paprrmcsgamma5g80=550,550,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1 +paprrmcsgain5g80=128,128,0,0,0,0,0,0,0,0,0,0 + + +# Enable papd for cck when target pwr ge 16dBm +cckpapd_pwrthresh=64 + +# energy detect threshold +ed_thresh2g=-67 +ed_thresh5g=-67 +ed_thresh6g=-67 + +# energy detect threshold for EU + +eu_edthresh2g=-67 +eu_edthresh5g=-67 +eu_edthresh6g=-67 + +## ULOFDMA Board limit PPRs for 2G20 ## +ruppr2g20bpska0=0x0 +ruppr2g20qpska0=0x0 +ruppr2g20qam16a0=0x0 +ruppr2g20qam64a0=0x1 +ruppr2g20qam256a0=0x21084 +ruppr2g20qam1024a0=0x50000 +## ULOFDMA Board limit PPRs for 2G40 ## +ruppr2g40bpska0=0x200000 +ruppr2g40qpska0=0x200000 +ruppr2g40qam16a0=0x200000 +ruppr2g40qam64a0=0x200001 +ruppr2g40qam256a0=0x421084 +ruppr2g40qam1024a0=0xA50000 +## ULOFDMA Board limit PPRs for 5G20 ## +ruppr5g20bpska0=0x20000 +ruppr5g20qpska0=0x18000 +ruppr5g20qam16a0=0x28000 +ruppr5g20qam64a0=0x29086 +ruppr5g20qam256a0=0x62908 +ruppr5g20qam1024a0=0x70000 +## ULOFDMA Board limit PPRs for 5G40 ## +ruppr5g40bpska0=0x638000 +ruppr5g40qpska0=0x840020 +ruppr5g40qam16a0=0x638001 +ruppr5g40qam64a0=0x739085 +ruppr5g40qam256a0=0x106a108 +ruppr5g40qam1024a0=0x1078000 +## ULOFDMA Board limit PPRs for 5G80 ## +ruppr5g80bpska0=0x0 +ruppr5g80qpska0=0x0 +ruppr5g80qam16a0=0x0 +ruppr5g80qam64a0=0x187218e7 +ruppr5g80qam256a0=0x3904254a +ruppr5g80qam1024a0=0x49068000 + +## ULOFDMA Board limit PPRs for 6G20 ## +ruppr6g20bpska0=0x0 +ruppr6g20qpska0=0x0 +ruppr6g20qam16a0=0x21084 +ruppr6g20qam64a0=0x5294A +ruppr6g20qam256a0=0x6318C +ruppr6g20qam1024a0=0x94A52 +## ULOFDMA Board limit PPRs for 6G40 ## +ruppr6g40bpska0=0x0 +ruppr6g40qpska0=0x0 +ruppr6g40qam16a0=0x421084 +ruppr6g40qam64a0=0xA5294A +ruppr6g40qam256a0=0xC6318C +ruppr6g40qam1024a0=0x1294A52 +## ULOFDMA Board limit PPRs for 6G80 ## +ruppr6g80bpska0=0x0 +ruppr6g80qpska0=0x0 +ruppr6g80qam16a0=0x10421084 +ruppr6g80qam64a0=0x28A5294A +ruppr6g80qam256a0=0x30C6318C +ruppr6g80qam1024a0=0x49294A52 + +# Base K Values (For the VHT case 5G 80/40/20/2G20) +proxd_basekival=35296,34652,36022,36142 +proxd_basektval=35299,34646,36022,36142 +# Offsets across channels (Upper nibble for target, lower nibble for initiator - saved in hex) +proxd_80mkval=0x1717,0,0,0,0,0x0000,0x0000 +proxd_40mkval=0x3636,0x3535,0,0,0,0,0,0,0,0,0x0000,0x2727,0x2727 +proxd_20mkval=0x4444,0x6363,0x1111,0x0000,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0x3737,0x8888,0x6666,0x5050,0x4444 +proxd_2gkval=0x1a1a,0x1c1c,0x4242,0x3434,0x3434,0x3333,0x0000,0x0101,0x0505,0x0909,0x3c3c,0,0,0 +# Offsets across frame formats @ Initiator +# Only for non-VHT frame (Leg6, Leg non-6, mcs0, non-mcs0) +# Delta between the base values are adjusted here +proxdi_rate80m=70598,70598,0,0 +proxdi_rate40m=69298,69298,0,0 +proxdi_rate20m=72044,72044,0,0 +proxdi_rate2g=72284,72284,0,0 +proxdi_ack=0,0,0,0 +# Offsets across frame formats @ Responder +proxdt_rate80m=70598,70598,0,0 +proxdt_rate40m=69298,69298,0,0 +proxdt_rate20m=72044,72044,0,0 +proxdt_rate2g=72284,72284,0,0 +proxdt_ack=0,0,0,0 +# Offsets for sub-bands (VHT, Leg6, Leg non-6, mcs0, non-mcs0) +proxd_sub80m20m=1627,-1627,-1627,0,0 +proxd_sub80m40m=976,-976,-976,0,0 +proxd_sub40m20m=586,-586,-586,586,586 diff --git a/proprietary/vendor/firmware/regulatory.db b/proprietary/vendor/firmware/regulatory.db new file mode 100644 index 0000000..bc1ec59 Binary files /dev/null and b/proprietary/vendor/firmware/regulatory.db differ diff --git a/proprietary/vendor/firmware/regulatory.db.p7s b/proprietary/vendor/firmware/regulatory.db.p7s new file mode 100644 index 0000000..ba6c5d7 Binary files /dev/null and b/proprietary/vendor/firmware/regulatory.db.p7s differ