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testing: RKVDEC 2 based vp9 hardware decoder

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This commit introduces vp9 hardware decoder present in vdpu381 on RK3588. Current testing shows that this can play until 4k@30fps - profile 0. Tested using various vp9 based videos and youtube. This is still in development phase and not production ready.
This commit is contained in:
dvab-sarma 2025-11-17 00:44:33 -06:00
parent 321723326f
commit fd0b1b17cb
4 changed files with 1257 additions and 2 deletions
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1197
drivers/media/platform/rockchip/rkvdec/rkvdec-vdpu381-vp9.c Normal file
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File diff suppressed because it is too large Load diff

2
drivers/media/platform/rockchip/rkvdec/rkvdec-vdpu381-vp9.h Normal file
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@ -0,0 +1,2 @@
#pragma once
static void adjust(int i, struct rkvdec_vdpu381_regs_vp9 * regs, struct rkvdec_decoded_buffer * ref_buf);

58
drivers/media/platform/rockchip/rkvdec/rkvdec.c
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@ -351,6 +351,32 @@ static const struct rkvdec_ctrls vdpu38x_hevc_ctrls = {
.num_ctrls = ARRAY_SIZE(vdpu38x_hevc_ctrl_descs),
};
static const struct rkvdec_ctrl_desc vdpu381_vp9_ctrl_descs[] = {
{
.cfg.id = V4L2_CID_STATELESS_VP9_FRAME,
},
{
.cfg.id = V4L2_CID_STATELESS_VP9_COMPRESSED_HDR,
},
{
.cfg.id = V4L2_CID_MPEG_VIDEO_VP9_PROFILE,
.cfg.min = V4L2_MPEG_VIDEO_VP9_PROFILE_0,
.cfg.max = V4L2_MPEG_VIDEO_VP9_PROFILE_0,
.cfg.def = V4L2_MPEG_VIDEO_VP9_PROFILE_0,
},
{
.cfg.id = V4L2_CID_MPEG_VIDEO_VP9_LEVEL,
.cfg.min = V4L2_MPEG_VIDEO_VP9_LEVEL_1_0,
.cfg.max = V4L2_MPEG_VIDEO_VP9_LEVEL_6_1,
},
};
static const struct rkvdec_ctrls vdpu381_vp9_ctrls = {
.ctrls = vdpu381_vp9_ctrl_descs,
.num_ctrls = ARRAY_SIZE(vdpu381_vp9_ctrl_descs),
};
static const struct rkvdec_decoded_fmt_desc rkvdec_h264_decoded_fmts[] = {
{
.fourcc = V4L2_PIX_FMT_NV12,
@ -383,6 +409,7 @@ static const struct rkvdec_ctrl_desc rkvdec_vp9_ctrl_descs[] = {
.cfg.max = V4L2_MPEG_VIDEO_VP9_PROFILE_0,
.cfg.def = V4L2_MPEG_VIDEO_VP9_PROFILE_0,
},
};
static const struct rkvdec_ctrls rkvdec_vp9_ctrls = {
@ -484,6 +511,23 @@ static const struct rkvdec_coded_fmt_desc vdpu381_coded_fmts[] = {
.subsystem_flags = VB2_V4L2_FL_SUPPORTS_M2M_HOLD_CAPTURE_BUF,
.capability = RKVDEC_CAPABILITY_HEVC,
},
{
.fourcc = V4L2_PIX_FMT_VP9_FRAME,
.frmsize = {
.min_width = 64,
.max_width = 65472,
.step_width = 64,
.min_height = 64,
.max_height = 65472,
.step_height = 64,
},
.ctrls = &vdpu381_vp9_ctrls,
.ops = &rkvdec_vdpu381_vp9_fmt_ops,
.num_decoded_fmts = ARRAY_SIZE(rkvdec_vp9_decoded_fmts),
.decoded_fmts = rkvdec_vp9_decoded_fmts,
.subsystem_flags = VB2_V4L2_FL_SUPPORTS_M2M_HOLD_CAPTURE_BUF,
.capability = RKVDEC_CAPABILITY_VP9,
}
};
static const struct rkvdec_coded_fmt_desc vdpu383_coded_fmts[] = {
@ -981,6 +1025,8 @@ static void rkvdec_stop_streaming(struct vb2_queue *q)
{
struct rkvdec_ctx *ctx = vb2_get_drv_priv(q);
vb2_wait_for_all_buffers(q);
if (V4L2_TYPE_IS_OUTPUT(q->type)) {
const struct rkvdec_coded_fmt_desc *desc = ctx->coded_fmt_desc;
@ -1417,13 +1463,19 @@ static irqreturn_t vdpu381_irq_handler(struct rkvdec_ctx *ctx)
if (status & (VDPU381_STA_INT_SOFTRESET_RDY |
VDPU381_STA_INT_TIMEOUT |
VDPU381_STA_INT_ERROR))
//dev_err(ctx->dev->dev, "iommu error. here : 16\n");
rkvdec_iommu_restore(rkvdec);
}
if (need_reset)
if (need_reset){
//dev_err(ctx->dev->dev, "iommu error. here : 14\n");
rkvdec_iommu_restore(rkvdec);
}
if (cancel_delayed_work(&rkvdec->watchdog_work))
//dev_err(ctx->dev->dev, "iommu error. here : 15\n");
rkvdec_job_finish(ctx, state);
return IRQ_HANDLED;
@ -1679,7 +1731,9 @@ static const struct rkvdec_variant rk3399_rkvdec_variant = {
static const struct rkvdec_variant rk3588_vdpu381_variant = {
.config = &config_vdpu381,
.capabilities = RKVDEC_CAPABILITY_H264 |
RKVDEC_CAPABILITY_HEVC,
RKVDEC_CAPABILITY_HEVC |
// testing
RKVDEC_CAPABILITY_VP9,
};
static const struct rkvdec_variant rk3576_vdpu383_variant = {

2
drivers/media/platform/rockchip/rkvdec/rkvdec.h
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@ -155,6 +155,7 @@ struct rkvdec_ctx {
struct rkvdec_dev *dev;
enum rkvdec_image_fmt image_fmt;
struct rkvdec_rcb_config *rcb_config;
int bit_depth;
u32 colmv_offset;
void *priv;
u8 has_sps_st_rps: 1;
@ -193,6 +194,7 @@ extern const struct rkvdec_coded_fmt_ops rkvdec_vp9_fmt_ops;
/* VDPU381 ops */
extern const struct rkvdec_coded_fmt_ops rkvdec_vdpu381_h264_fmt_ops;
extern const struct rkvdec_coded_fmt_ops rkvdec_vdpu381_hevc_fmt_ops;
extern const struct rkvdec_coded_fmt_ops rkvdec_vdpu381_vp9_fmt_ops;
/* VDPU383 ops */
extern const struct rkvdec_coded_fmt_ops rkvdec_vdpu383_h264_fmt_ops;