lineage-rockchip/android_kernel_rockchip_tart
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Enabling PCI Support on RK3588

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Due to a mistake, Kernel sets the PCI port to Endpoint mode and wouldn't detect nvme drives. With this correction, removes the PCI endpoint config and replaces it with HOST mode only config.
Intial tests are working, detecting the NVME drive but for some NVME drives due to APST and PCIe ASPM/port PM, would not be detected or cause issues.
This commit is contained in:
dvab-sarma 2025-12-10 13:56:30 -06:00
parent 5ba93ec015
commit 2a84642e99
2 changed files with 18 additions and 48 deletions
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43
arch/arm64/boot/dts/rockchip/rk3588s-orangepi-5-pro-1.dts
View file

@ -75,20 +75,6 @@
};
// dp0-con {
// compatible = "dp-connector";
// label = "DP OUT";
// type = "mini";
// port {
// dp_con_in: endpoint {
// remote-endpoint = <&dp0_out_con>;
// };
// };
// };
hdmi0-con {
compatible = "hdmi-connector";
type = "a";
@ -304,7 +290,7 @@
gpios = <&gpio1 RK_PC2 GPIO_ACTIVE_HIGH>;
label = "green_led";
linux,default-trigger = "disk-activity";
//linux,default-trigger-delay-ms = <0>;
linux,default-trigger-delay-ms = <0>;
};
@ -343,8 +329,6 @@
pinctrl-0 = <&dp0m0_pins>;
pinctrl-names = "default";
//hpd-gpios = <&gpio4 RK_PB4 GPIO_ACTIVE_HIGH>;
//pinctrl-0 = <&dp0_hpd>;
status = "okay";
};
@ -365,10 +349,6 @@
status = "okay";
};
// &dp0_out {
// };
&vdec0 {
status = "okay";
};
@ -870,10 +850,6 @@
};
};
// &display_subsystem {
// clocks = <&hdptxphy_hdmi0>;
// clock-names = "hdmi0_phy_pll";
// };
&cpu_l0 {
cpu-supply = <&vdd_cpu_lit_s0>;
@ -1149,14 +1125,6 @@
wifi_host_wake_irq: wifi-host-wake-irq {
rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_down>;
};
// wifi_poweren_pin: wifi-poweren-pin {
// rockchip,pins = <1 RK_PD3 RK_FUNC_GPIO &pcfg_pull_up>;
// };
// wifi_poweren_pin: wifi-poweren-pin {
// rockchip,pins = <0 RK_PD0 RK_FUNC_GPIO &pcfg_pull_down>;
// };
};
leds_gpio {
@ -1220,20 +1188,21 @@
&usb_host0_xhci {
status = "okay";
//dr_mode = "host";
dr_mode = "otg";
dr_mode = "host";
extcon = <&u2phy0>;
//maximum-speed = "high-speed";
status = "okay";
};
&usb_host2_xhci {
status = "okay";
status = "disabled";
};
&usbdp_phy0 {
status = "okay";
// rockchip,dp-lane-mux = <0 1>;
rockchip,dp-lane-mux = <0 1>;
};

23
arch/arm64/configs/android_orangepi5_defconfig
View file

@ -2034,7 +2034,7 @@ CONFIG_HOTPLUG_PCI=y
# CONFIG_PCIE_MICROCHIP_HOST is not set
CONFIG_PCIE_ROCKCHIP=y
CONFIG_PCIE_ROCKCHIP_HOST=y
CONFIG_PCIE_ROCKCHIP_EP=y
CONFIG_PCIE_ROCKCHIP_EP=n
# CONFIG_PCI_XGENE is not set
# CONFIG_PCIE_XILINX is not set
@ -2060,7 +2060,8 @@ CONFIG_PCIE_RK_THREADED_INIT=y
# CONFIG_PCIE_KIRIN is not set
# CONFIG_PCIE_DW_PLAT_HOST is not set
# CONFIG_PCIE_DW_PLAT_EP is not set
CONFIG_PCIE_ROCKCHIP_DW_HOST=n
CONFIG_PCIE_ROCKCHIP_DW_HOST=y
CONFIG_PCIE_ROCKCHIP_DW=y
# end of DesignWare-based PCIe controllers
#
@ -2072,8 +2073,8 @@ CONFIG_PCIE_ROCKCHIP_DW_HOST=n
#
# PCI Endpoint
#
CONFIG_PCI_ENDPOINT=y
CONFIG_PCI_ENDPOINT_CONFIGFS=y
CONFIG_PCI_ENDPOINT=n
CONFIG_PCI_ENDPOINT_CONFIGFS=n
# CONFIG_PCI_EPF_TEST is not set
CONFIG_PCI_EPF_NTB=m
# CONFIG_PCI_EPF_MHI is not set
@ -2416,7 +2417,8 @@ CONFIG_NVME_FABRICS=m
CONFIG_NVME_FC=m
# CONFIG_NVME_TCP is not set
# CONFIG_NVME_AUTH is not set
CONFIG_NVME_TARGET=m
CONFIG_NVME_TARGET=y
CONFIG_NVME_TARGET_DEBUGFS=y
# CONFIG_NVME_TARGET_PASSTHRU is not set
CONFIG_NVME_TARGET_LOOP=m
CONFIG_NVME_TARGET_FC=m
@ -3179,7 +3181,7 @@ CONFIG_MICREL_PHY=y
CONFIG_MICROCHIP_PHY=m
CONFIG_MICROCHIP_T1_PHY=m
# CONFIG_MICROSEMI_PHY is not set
CONFIG_MOTORCOMM_PHY=m
CONFIG_MOTORCOMM_PHY=y
CONFIG_NATIONAL_PHY=m
# CONFIG_NXP_CBTX_PHY is not set
CONFIG_NXP_C45_TJA11XX_PHY=m
@ -3187,7 +3189,7 @@ CONFIG_NXP_C45_TJA11XX_PHY=m
# CONFIG_NCN26000_PHY is not set
CONFIG_AT803X_PHY=m
CONFIG_QSEMI_PHY=m
CONFIG_REALTEK_PHY=m
CONFIG_REALTEK_PHY=y
# CONFIG_RENESAS_PHY is not set
CONFIG_ROCKCHIP_PHY=y
CONFIG_SMSC_PHY=m
@ -3273,7 +3275,7 @@ CONFIG_MDIO_DEVRES=y
CONFIG_MDIO_BITBANG=y
CONFIG_MDIO_BCM_UNIMAC=m
CONFIG_MDIO_CAVIUM=y
# CONFIG_MDIO_GPIO is not set
CONFIG_MDIO_GPIO=y
# CONFIG_MDIO_HISI_FEMAC is not set
CONFIG_MDIO_I2C=m
CONFIG_MDIO_MVUSB=m
@ -7130,8 +7132,8 @@ CONFIG_USB_CDNS_SUPPORT=m
# CONFIG_USB_MUSB_HDRC is not set
CONFIG_USB_DWC3=y
# CONFIG_USB_DWC3_ULPI is not set
# CONFIG_USB_DWC3_HOST is not set
CONFIG_USB_DWC3_GADGET=y
CONFIG_USB_DWC3_HOST=n
CONFIG_USB_DWC3_GADGET=n
CONFIG_USB_DWC3_DUAL_ROLE=y
#
@ -8957,7 +8959,6 @@ CONFIG_PHY_ROCKCHIP_SAMSUNG_HDPTX=y
CONFIG_PHY_ROCKCHIP_SAMSUNG_HDPTX_HDMI=y
CONFIG_PHY_ROCKCHIP_SNPS_PCIE3=y
CONFIG_PHY_ROCKCHIP_TYPEC=y
CONFIG_PHY_ROCKCHIP_TYPEC=y
CONFIG_PHY_ROCKCHIP_USB=y
CONFIG_PHY_ROCKCHIP_USBDP=y
#CONFIG_PHY_SAMSUNG_USB2=y