The multi-planar formats are being allocated into a single plane, and the minigbm exynos backend is dropped. So we can use `handle` instead of handles as of now. Remove some of the helper functions that calculate the number of planes. There is no need to check if there is more than one kernel buffer per buffer object. Added a new function `drv_gem_close` in `drv_helpers` that can be used by `drv_gem_bo_destroy` and `drv_prime_bo_import`. It can be used to clean the unused gem_handle. Bug=b:266776512 TEST=camera and screenshot work fine after deploying the change #strongbad TEST=camera and screenshot work fine after deploying the change #kukui-arc-r TEST=camera and screenshot work fine after deploying the change, tested a couple of apps in the Google Play Store, and checked file `dma_buf/bufinfo` to see there's no object leaking. #guybrush Change-Id: Ib63559504e4cb8f1a32ae90170925146613d694f Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/minigbm/+/4297873 Commit-Queue: Dawn Han <dawnhan@google.com> Reviewed-by: Yiwei Zhang <zzyiwei@chromium.org> Tested-by: Dawn Han <dawnhan@google.com>
289 lines
8.6 KiB
C
289 lines
8.6 KiB
C
/*
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* Copyright 2014 The Chromium OS Authors. All rights reserved.
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* Use of this source code is governed by a BSD-style license that can be
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* found in the LICENSE file.
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*/
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#ifdef DRV_ROCKCHIP
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#include <drm_fourcc.h>
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#include <errno.h>
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#include <inttypes.h>
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#include <rockchip_drm.h>
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#include <stdio.h>
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#include <string.h>
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#include <sys/mman.h>
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#include <xf86drm.h>
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#include "drv_helpers.h"
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#include "drv_priv.h"
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#include "util.h"
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#define DRM_FORMAT_MOD_ROCKCHIP_AFBC \
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DRM_FORMAT_MOD_ARM_AFBC(AFBC_FORMAT_MOD_BLOCK_SIZE_16x16 | AFBC_FORMAT_MOD_SPARSE | \
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AFBC_FORMAT_MOD_YTR)
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struct rockchip_private_map_data {
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void *cached_addr;
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void *gem_addr;
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};
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static const uint32_t scanout_render_formats[] = { DRM_FORMAT_ABGR8888, DRM_FORMAT_ARGB8888,
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DRM_FORMAT_BGR888, DRM_FORMAT_RGB565,
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DRM_FORMAT_XBGR8888, DRM_FORMAT_XRGB8888 };
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static const uint32_t texture_only_formats[] = { DRM_FORMAT_NV12, DRM_FORMAT_YVU420,
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DRM_FORMAT_YVU420_ANDROID };
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static int afbc_bo_from_format(struct bo *bo, uint32_t width, uint32_t height, uint32_t format,
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uint64_t modifier)
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{
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/* We've restricted ourselves to four bytes per pixel. */
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const uint32_t pixel_size = 4;
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const uint32_t clump_width = 4;
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const uint32_t clump_height = 4;
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#define AFBC_NARROW 1
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#if AFBC_NARROW == 1
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const uint32_t block_width = 4 * clump_width;
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const uint32_t block_height = 4 * clump_height;
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#else
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const uint32_t block_width = 8 * clump_width;
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const uint32_t block_height = 2 * clump_height;
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#endif
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const uint32_t header_block_size = 16;
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const uint32_t body_block_size = block_width * block_height * pixel_size;
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const uint32_t width_in_blocks = DIV_ROUND_UP(width, block_width);
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const uint32_t height_in_blocks = DIV_ROUND_UP(height, block_height);
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const uint32_t total_blocks = width_in_blocks * height_in_blocks;
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const uint32_t header_plane_size = total_blocks * header_block_size;
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const uint32_t body_plane_size = total_blocks * body_block_size;
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/* GPU requires 64 bytes, but EGL import code expects 1024 byte
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* alignement for the body plane. */
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const uint32_t body_plane_alignment = 1024;
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const uint32_t body_plane_offset = ALIGN(header_plane_size, body_plane_alignment);
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const uint32_t total_size = body_plane_offset + body_plane_size;
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bo->meta.strides[0] = width_in_blocks * block_width * pixel_size;
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bo->meta.sizes[0] = total_size;
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bo->meta.offsets[0] = 0;
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bo->meta.total_size = total_size;
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bo->meta.format_modifier = modifier;
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return 0;
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}
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static int rockchip_init(struct driver *drv)
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{
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struct format_metadata metadata;
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metadata.tiling = 0;
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metadata.priority = 1;
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metadata.modifier = DRM_FORMAT_MOD_LINEAR;
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drv_add_combinations(drv, scanout_render_formats, ARRAY_SIZE(scanout_render_formats),
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&metadata, BO_USE_RENDER_MASK | BO_USE_SCANOUT);
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drv_add_combinations(drv, texture_only_formats, ARRAY_SIZE(texture_only_formats), &metadata,
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BO_USE_TEXTURE_MASK);
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/* NV12 format for camera, display, decoding and encoding. */
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/* Camera ISP supports only NV12 output. */
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drv_modify_combination(drv, DRM_FORMAT_NV12, &metadata,
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BO_USE_CAMERA_READ | BO_USE_CAMERA_WRITE | BO_USE_SCANOUT |
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BO_USE_HW_VIDEO_DECODER | BO_USE_HW_VIDEO_ENCODER);
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drv_modify_linear_combinations(drv);
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/*
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* R8 format is used for Android's HAL_PIXEL_FORMAT_BLOB and is used for JPEG snapshots
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* from camera and input/output from hardware decoder/encoder.
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*/
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drv_add_combination(drv, DRM_FORMAT_R8, &metadata,
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BO_USE_CAMERA_READ | BO_USE_CAMERA_WRITE | BO_USE_SW_MASK |
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BO_USE_LINEAR | BO_USE_HW_VIDEO_DECODER | BO_USE_HW_VIDEO_ENCODER |
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BO_USE_GPU_DATA_BUFFER | BO_USE_SENSOR_DIRECT_DATA);
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return 0;
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}
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static int rockchip_bo_create_with_modifiers(struct bo *bo, uint32_t width, uint32_t height,
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uint32_t format, const uint64_t *modifiers,
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uint32_t count)
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{
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int ret;
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struct drm_rockchip_gem_create gem_create = { 0 };
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uint64_t afbc_modifier;
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if (drv_has_modifier(modifiers, count, DRM_FORMAT_MOD_ROCKCHIP_AFBC))
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afbc_modifier = DRM_FORMAT_MOD_ROCKCHIP_AFBC;
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else if (drv_has_modifier(modifiers, count, DRM_FORMAT_MOD_CHROMEOS_ROCKCHIP_AFBC))
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afbc_modifier = DRM_FORMAT_MOD_CHROMEOS_ROCKCHIP_AFBC;
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else
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afbc_modifier = 0;
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if (format == DRM_FORMAT_NV12) {
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uint32_t w_mbs = DIV_ROUND_UP(width, 16);
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uint32_t h_mbs = DIV_ROUND_UP(height, 16);
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uint32_t aligned_width = w_mbs * 16;
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uint32_t aligned_height = h_mbs * 16;
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drv_bo_from_format(bo, aligned_width, 1, aligned_height, format);
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/*
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* drv_bo_from_format updates total_size. Add an extra data space for rockchip video
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* driver to store motion vectors.
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*/
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bo->meta.total_size += w_mbs * h_mbs * 128;
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} else if (width <= 2560 && afbc_modifier && bo->drv->compression) {
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/* If the caller has decided they can use AFBC, always
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* pick that */
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afbc_bo_from_format(bo, width, height, format, afbc_modifier);
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} else {
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if (!drv_has_modifier(modifiers, count, DRM_FORMAT_MOD_LINEAR)) {
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errno = EINVAL;
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drv_loge("no usable modifier found\n");
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return -errno;
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}
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uint32_t stride;
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/*
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* Since the ARM L1 cache line size is 64 bytes, align to that
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* as a performance optimization. For YV12, the Mali cmem allocator
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* requires that chroma planes are aligned to 64-bytes, so align the
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* luma plane to 128 bytes.
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*/
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stride = drv_stride_from_format(format, width, 0);
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if (format == DRM_FORMAT_YVU420 || format == DRM_FORMAT_YVU420_ANDROID)
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stride = ALIGN(stride, 128);
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else
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stride = ALIGN(stride, 64);
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drv_bo_from_format(bo, stride, 1, height, format);
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}
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gem_create.size = bo->meta.total_size;
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ret = drmIoctl(bo->drv->fd, DRM_IOCTL_ROCKCHIP_GEM_CREATE, &gem_create);
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if (ret) {
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drv_loge("DRM_IOCTL_ROCKCHIP_GEM_CREATE failed (size=%" PRIu64 ")\n",
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gem_create.size);
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return -errno;
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}
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bo->handle.u32 = gem_create.handle;
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return 0;
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}
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static int rockchip_bo_create(struct bo *bo, uint32_t width, uint32_t height, uint32_t format,
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uint64_t use_flags)
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{
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uint64_t modifiers[] = { DRM_FORMAT_MOD_LINEAR };
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return rockchip_bo_create_with_modifiers(bo, width, height, format, modifiers,
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ARRAY_SIZE(modifiers));
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}
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static void *rockchip_bo_map(struct bo *bo, struct vma *vma, uint32_t map_flags)
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{
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int ret;
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struct rockchip_private_map_data *priv;
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struct drm_rockchip_gem_map_off gem_map = { 0 };
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void *addr = NULL;
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/* We can only map buffers created with SW access flags, which should
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* have no modifiers (ie, not AFBC). */
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if (bo->meta.format_modifier == DRM_FORMAT_MOD_CHROMEOS_ROCKCHIP_AFBC ||
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bo->meta.format_modifier == DRM_FORMAT_MOD_ROCKCHIP_AFBC)
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return MAP_FAILED;
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gem_map.handle = bo->handle.u32;
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ret = drmIoctl(bo->drv->fd, DRM_IOCTL_ROCKCHIP_GEM_MAP_OFFSET, &gem_map);
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if (ret) {
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drv_loge("DRM_IOCTL_ROCKCHIP_GEM_MAP_OFFSET failed\n");
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return MAP_FAILED;
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}
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addr = mmap(0, bo->meta.total_size, drv_get_prot(map_flags), MAP_SHARED, bo->drv->fd,
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gem_map.offset);
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if (addr == MAP_FAILED)
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return MAP_FAILED;
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vma->length = bo->meta.total_size;
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if (bo->meta.use_flags & BO_USE_RENDERSCRIPT) {
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priv = calloc(1, sizeof(*priv));
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if (!priv)
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goto out_unmap_addr;
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priv->cached_addr = calloc(1, bo->meta.total_size);
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if (!priv->cached_addr)
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goto out_free_priv;
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priv->gem_addr = addr;
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vma->priv = priv;
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addr = priv->cached_addr;
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}
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return addr;
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out_free_priv:
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free(priv);
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out_unmap_addr:
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munmap(addr, bo->meta.total_size);
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return MAP_FAILED;
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}
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static int rockchip_bo_unmap(struct bo *bo, struct vma *vma)
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{
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if (vma->priv) {
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struct rockchip_private_map_data *priv = vma->priv;
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vma->addr = priv->gem_addr;
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free(priv->cached_addr);
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free(priv);
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vma->priv = NULL;
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}
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return munmap(vma->addr, vma->length);
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}
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static int rockchip_bo_invalidate(struct bo *bo, struct mapping *mapping)
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{
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if (mapping->vma->priv) {
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struct rockchip_private_map_data *priv = mapping->vma->priv;
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memcpy(priv->cached_addr, priv->gem_addr, bo->meta.total_size);
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}
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return 0;
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}
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static int rockchip_bo_flush(struct bo *bo, struct mapping *mapping)
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{
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struct rockchip_private_map_data *priv = mapping->vma->priv;
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if (priv && (mapping->vma->map_flags & BO_MAP_WRITE))
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memcpy(priv->gem_addr, priv->cached_addr, bo->meta.total_size);
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return 0;
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}
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const struct backend backend_rockchip = {
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.name = "rockchip",
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.init = rockchip_init,
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.bo_create = rockchip_bo_create,
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.bo_create_with_modifiers = rockchip_bo_create_with_modifiers,
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.bo_destroy = drv_gem_bo_destroy,
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.bo_import = drv_prime_bo_import,
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.bo_map = rockchip_bo_map,
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.bo_unmap = rockchip_bo_unmap,
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.bo_invalidate = rockchip_bo_invalidate,
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.bo_flush = rockchip_bo_flush,
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.resolve_format_and_use_flags = drv_resolve_format_and_use_flags_helper,
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};
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#endif
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