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minigbm: clean up bo.handles

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The multi-planar formats are being allocated into a single plane,
and the minigbm exynos backend is dropped. So we can use `handle` instead of handles as of now.

Remove some of the helper functions that calculate the number of planes.
There is no need to check if there is more than one kernel buffer per buffer object.

Added a new function `drv_gem_close` in `drv_helpers` that can be used by `drv_gem_bo_destroy` and `drv_prime_bo_import`. It can be used to clean the unused gem_handle.

Bug=b:266776512
TEST=camera and screenshot work fine after deploying the change #strongbad
TEST=camera and screenshot work fine after deploying the change #kukui-arc-r
TEST=camera and screenshot work fine after deploying the change, tested a couple of apps in the Google Play Store, and checked file `dma_buf/bufinfo` to see there's no object leaking. #guybrush

Change-Id: Ib63559504e4cb8f1a32ae90170925146613d694f
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/minigbm/+/4297873
Commit-Queue: Dawn Han <dawnhan@google.com>
Reviewed-by: Yiwei Zhang <zzyiwei@chromium.org>
Tested-by: Dawn Han <dawnhan@google.com>
This commit is contained in:
Dawn Han 2023-02-28 17:55:34 +00:00 • committed by Chromeos LUCI
parent 6f3f6cb93a
commit 84b3a09ef0
15 changed files with 71 additions and 144 deletions
Download patch file Download diff file Expand all files Collapse all files

13
amdgpu.c
View file

@ -520,7 +520,7 @@ static int amdgpu_create_bo_linear(struct bo *bo, uint32_t width, uint32_t heigh
int ret;
bool need_align = false;
uint32_t stride_align = 1;
uint32_t plane, stride;
uint32_t stride;
union drm_amdgpu_gem_create gem_create = { { 0 } };
struct amdgpu_priv *priv = bo->drv->priv;
@ -609,8 +609,7 @@ static int amdgpu_create_bo_linear(struct bo *bo, uint32_t width, uint32_t heigh
if (ret < 0)
return ret;
for (plane = 0; plane < bo->meta.num_planes; plane++)
bo->handles[plane].u32 = gem_create.out.handle;
bo->handle.u32 = gem_create.out.handle;
bo->meta.format_modifier = DRM_FORMAT_MOD_LINEAR;
@ -703,7 +702,7 @@ static void *amdgpu_map_bo(struct bo *bo, struct vma *vma, uint32_t map_flags)
union drm_amdgpu_gem_mmap gem_map = { { 0 } };
struct drm_amdgpu_gem_create_in bo_info = { 0 };
struct drm_amdgpu_gem_op gem_op = { 0 };
uint32_t handle = bo->handles[0].u32;
uint32_t handle = bo->handle.u32;
struct amdgpu_linear_vma_priv *priv = NULL;
struct amdgpu_priv *drv_priv;
@ -745,7 +744,7 @@ static void *amdgpu_map_bo(struct bo *bo, struct vma *vma, uint32_t map_flags)
priv->map_flags = map_flags;
handle = priv->handle = gem_create.out.handle;
ret = sdma_copy(bo->drv->priv, bo->drv->fd, bo->handles[0].u32, priv->handle,
ret = sdma_copy(bo->drv->priv, bo->drv->fd, bo->handle.u32, priv->handle,
bo_info.bo_size);
if (ret) {
drv_loge("SDMA copy for read failed\n");
@ -793,7 +792,7 @@ static int amdgpu_unmap_bo(struct bo *bo, struct vma *vma)
if (BO_MAP_WRITE & priv->map_flags) {
r = sdma_copy(bo->drv->priv, bo->drv->fd, priv->handle,
bo->handles[0].u32, vma->length);
bo->handle.u32, vma->length);
if (r)
return r;
}
@ -814,7 +813,7 @@ static int amdgpu_bo_invalidate(struct bo *bo, struct mapping *mapping)
if (bo->priv)
return 0;
wait_idle.in.handle = bo->handles[0].u32;
wait_idle.in.handle = bo->handle.u32;
wait_idle.in.timeout = AMDGPU_TIMEOUT_INFINITE;
ret = drmCommandWriteRead(bo->drv->fd, DRM_AMDGPU_GEM_WAIT_IDLE, &wait_idle,

9
cros_gralloc/cros_gralloc_buffer.cc
View file

@ -133,15 +133,6 @@ int32_t cros_gralloc_buffer::lock(const struct rectangle *rect, uint32_t map_fla
memset(addr, 0, DRV_MAX_PLANES * sizeof(*addr));
/*
* Gralloc consumers don't support more than one kernel buffer per buffer object yet, so
* just use the first kernel buffer.
*/
if (drv_num_buffers_per_bo(bo_) != 1) {
ALOGE("Can only support one buffer per bo.");
return -EINVAL;
}
if (map_flags) {
if (lock_data_[0]) {
drv_bo_invalidate(bo_, lock_data_[0]);

11
cros_gralloc/cros_gralloc_driver.cc
View file

@ -273,16 +273,6 @@ int32_t cros_gralloc_driver::allocate(const struct cros_gralloc_buffer_descripto
return -errno;
}
/*
* If there is a desire for more than one kernel buffer, this can be
* removed once the ArcCodec and Wayland service have the ability to
* send more than one fd. GL/Vulkan drivers may also have to modified.
*/
if (drv_num_buffers_per_bo(bo) != 1) {
ALOGE("Can only support one buffer per bo.");
goto destroy_bo;
}
num_planes = drv_bo_get_num_planes(bo);
num_fds = num_planes;
@ -359,7 +349,6 @@ destroy_hnd:
native_handle_close(hnd);
native_handle_delete(hnd);
destroy_bo:
drv_bo_destroy(bo);
return ret;
}

7
dri.c
View file

@ -126,6 +126,7 @@ static int import_into_minigbm(struct dri_driver *dri, struct bo *bo)
return ret;
}
bo->handle.u32 = handle;
for (int i = 0; i < num_planes; ++i) {
int stride, offset;
plane_image = dri->image_extension->fromPlanar(bo->priv, i, NULL);
@ -140,10 +141,6 @@ static int import_into_minigbm(struct dri_driver *dri, struct bo *bo)
bo->meta.strides[i] = stride;
bo->meta.offsets[i] = offset;
if (i > 0 && bo->meta.offsets[i] <= bo->meta.offsets[i - 1])
goto cleanup;
bo->handles[i].u32 = handle;
if (plane_image)
dri->image_extension->destroyImage(plane_image);
@ -396,7 +393,7 @@ int dri_bo_release(struct bo *bo)
int dri_bo_destroy(struct bo *bo)
{
assert(bo->priv);
close_gem_handle(bo->handles[0].u32, bo->drv->fd);
close_gem_handle(bo->handle.u32, bo->drv->fd);
bo->priv = NULL;
return 0;
}

50
drv.c
View file

@ -250,7 +250,7 @@ static void drv_bo_mapping_destroy(struct bo *bo)
while (idx < drv_array_size(drv->mappings)) {
struct mapping *mapping =
(struct mapping *)drv_array_at_idx(drv->mappings, idx);
if (mapping->vma->handle != bo->handles[plane].u32) {
if (mapping->vma->handle != bo->handle.u32) {
idx++;
continue;
}
@ -285,10 +285,10 @@ static void drv_bo_acquire(struct bo *bo)
for (size_t plane = 0; plane < bo->meta.num_planes; plane++) {
uintptr_t num = 0;
if (!drmHashLookup(drv->buffer_table, bo->handles[plane].u32, (void **)&num))
drmHashDelete(drv->buffer_table, bo->handles[plane].u32);
if (!drmHashLookup(drv->buffer_table, bo->handle.u32, (void **)&num))
drmHashDelete(drv->buffer_table, bo->handle.u32);
drmHashInsert(drv->buffer_table, bo->handles[plane].u32, (void *)(num + 1));
drmHashInsert(drv->buffer_table, bo->handle.u32, (void *)(num + 1));
}
pthread_mutex_unlock(&drv->buffer_table_lock);
}
@ -307,19 +307,18 @@ static bool drv_bo_release(struct bo *bo)
pthread_mutex_lock(&drv->buffer_table_lock);
for (size_t plane = 0; plane < bo->meta.num_planes; plane++) {
if (!drmHashLookup(drv->buffer_table, bo->handles[plane].u32, (void **)&num)) {
drmHashDelete(drv->buffer_table, bo->handles[plane].u32);
if (!drmHashLookup(drv->buffer_table, bo->handle.u32, (void **)&num)) {
drmHashDelete(drv->buffer_table, bo->handle.u32);
if (num > 1) {
drmHashInsert(drv->buffer_table, bo->handles[plane].u32,
(void *)(num - 1));
drmHashInsert(drv->buffer_table, bo->handle.u32, (void *)(num - 1));
}
}
}
/* The same buffer can back multiple planes with different offsets. */
for (size_t plane = 0; plane < bo->meta.num_planes; plane++) {
if (!drmHashLookup(drv->buffer_table, bo->handles[plane].u32, (void **)&num)) {
if (!drmHashLookup(drv->buffer_table, bo->handle.u32, (void **)&num)) {
/* num is positive if found in the hashmap. */
pthread_mutex_unlock(&drv->buffer_table_lock);
return false;
@ -491,8 +490,7 @@ void *drv_bo_map(struct bo *bo, const struct rectangle *rect, uint32_t map_flags
for (i = 0; i < drv_array_size(drv->mappings); i++) {
struct mapping *prior = (struct mapping *)drv_array_at_idx(drv->mappings, i);
if (prior->vma->handle != bo->handles[plane].u32 ||
prior->vma->map_flags != map_flags)
if (prior->vma->handle != bo->handle.u32 || prior->vma->map_flags != map_flags)
continue;
if (rect->x != prior->rect.x || rect->y != prior->rect.y ||
@ -506,8 +504,7 @@ void *drv_bo_map(struct bo *bo, const struct rectangle *rect, uint32_t map_flags
for (i = 0; i < drv_array_size(drv->mappings); i++) {
struct mapping *prior = (struct mapping *)drv_array_at_idx(drv->mappings, i);
if (prior->vma->handle != bo->handles[plane].u32 ||
prior->vma->map_flags != map_flags)
if (prior->vma->handle != bo->handle.u32 || prior->vma->map_flags != map_flags)
continue;
prior->vma->refcount++;
@ -533,7 +530,7 @@ void *drv_bo_map(struct bo *bo, const struct rectangle *rect, uint32_t map_flags
mapping.vma->refcount = 1;
mapping.vma->addr = addr;
mapping.vma->handle = bo->handles[plane].u32;
mapping.vma->handle = bo->handle.u32;
mapping.vma->map_flags = map_flags;
success:
@ -639,7 +636,7 @@ size_t drv_bo_get_num_planes(struct bo *bo)
union bo_handle drv_bo_get_plane_handle(struct bo *bo, size_t plane)
{
return bo->handles[plane];
return bo->handle;
}
#ifndef DRM_RDWR
@ -655,11 +652,11 @@ int drv_bo_get_plane_fd(struct bo *bo, size_t plane)
if (bo->is_test_buffer)
return -EINVAL;
ret = drmPrimeHandleToFD(bo->drv->fd, bo->handles[plane].u32, DRM_CLOEXEC | DRM_RDWR, &fd);
ret = drmPrimeHandleToFD(bo->drv->fd, bo->handle.u32, DRM_CLOEXEC | DRM_RDWR, &fd);
// Older DRM implementations blocked DRM_RDWR, but gave a read/write mapping anyways
if (ret)
ret = drmPrimeHandleToFD(bo->drv->fd, bo->handles[plane].u32, DRM_CLOEXEC, &fd);
ret = drmPrimeHandleToFD(bo->drv->fd, bo->handle.u32, DRM_CLOEXEC, &fd);
if (ret)
drv_loge("Failed to get plane fd: %s\n", strerror(errno));
@ -727,25 +724,6 @@ void drv_resolve_format_and_use_flags(struct driver *drv, uint32_t format, uint6
out_use_flags);
}
uint32_t drv_num_buffers_per_bo(struct bo *bo)
{
uint32_t count = 0;
size_t plane, p;
if (bo->is_test_buffer)
return 0;
for (plane = 0; plane < bo->meta.num_planes; plane++) {
for (p = 0; p < plane; p++)
if (bo->handles[p].u32 == bo->handles[plane].u32)
break;
if (p == plane)
count++;
}
return count;
}
void drv_log_prefix(enum drv_log_level level, const char *prefix, const char *file, int line,
const char *format, ...)
{

3
drv.h
View file

@ -207,9 +207,6 @@ uint64_t drv_resolve_use_flags(struct driver *drv, uint32_t format, uint64_t use
size_t drv_num_planes_from_format(uint32_t format);
size_t drv_num_planes_from_modifier(struct driver *drv, uint32_t format, uint64_t modifier);
uint32_t drv_num_buffers_per_bo(struct bo *bo);
int drv_resource_info(struct bo *bo, uint32_t strides[DRV_MAX_PLANES],
uint32_t offsets[DRV_MAX_PLANES], uint64_t *format_modifier);

53
drv_helpers.c
View file

@ -329,7 +329,6 @@ int drv_dumb_bo_create_ex(struct bo *bo, uint32_t width, uint32_t height, uint32
uint64_t use_flags, uint64_t quirks)
{
int ret;
size_t plane;
uint32_t aligned_width, aligned_height;
struct drm_mode_create_dumb create_dumb = { 0 };
@ -387,8 +386,7 @@ int drv_dumb_bo_create_ex(struct bo *bo, uint32_t width, uint32_t height, uint32
drv_bo_from_format(bo, create_dumb.pitch, 1, height, format);
for (plane = 0; plane < bo->meta.num_planes; plane++)
bo->handles[plane].u32 = create_dumb.handle;
bo->handle.u32 = create_dumb.handle;
bo->meta.total_size = create_dumb.size;
return 0;
@ -405,44 +403,38 @@ int drv_dumb_bo_destroy(struct bo *bo)
int ret;
struct drm_mode_destroy_dumb destroy_dumb = { 0 };
destroy_dumb.handle = bo->handles[0].u32;
destroy_dumb.handle = bo->handle.u32;
ret = drmIoctl(bo->drv->fd, DRM_IOCTL_MODE_DESTROY_DUMB, &destroy_dumb);
if (ret) {
drv_loge("DRM_IOCTL_MODE_DESTROY_DUMB failed (handle=%x)\n", bo->handles[0].u32);
drv_loge("DRM_IOCTL_MODE_DESTROY_DUMB failed (handle=%x)\n", bo->handle.u32);
return -errno;
}
return 0;
}
int drv_gem_bo_destroy(struct bo *bo)
static int drv_gem_close(struct driver *drv, uint32_t gem_handle)
{
struct drm_gem_close gem_close;
int ret, error = 0;
size_t plane, i;
for (plane = 0; plane < bo->meta.num_planes; plane++) {
for (i = 0; i < plane; i++)
if (bo->handles[i].u32 == bo->handles[plane].u32)
break;
/* Make sure close hasn't already been called on this handle */
if (i != plane)
continue;
memset(&gem_close, 0, sizeof(gem_close));
gem_close.handle = bo->handles[plane].u32;
gem_close.handle = gem_handle;
ret = drmIoctl(bo->drv->fd, DRM_IOCTL_GEM_CLOSE, &gem_close);
ret = drmIoctl(drv->fd, DRM_IOCTL_GEM_CLOSE, &gem_close);
if (ret) {
drv_loge("DRM_IOCTL_GEM_CLOSE failed (handle=%x) error %d\n",
bo->handles[plane].u32, ret);
drv_loge("DRM_IOCTL_GEM_CLOSE failed (handle=%x) error %d\n", gem_handle, ret);
error = -errno;
}
}
return error;
}
int drv_gem_bo_destroy(struct bo *bo)
{
return drv_gem_close(bo->drv, bo->handle.u32);
}
int drv_prime_bo_import(struct bo *bo, struct drv_import_fd_data *data)
{
int ret;
@ -455,21 +447,20 @@ int drv_prime_bo_import(struct bo *bo, struct drv_import_fd_data *data)
ret = drmIoctl(bo->drv->fd, DRM_IOCTL_PRIME_FD_TO_HANDLE, &prime_handle);
if (plane > 0 && !ret && bo->handle.u32 != prime_handle.handle) {
drv_gem_close(bo->drv, prime_handle.handle);
ret = -1;
errno = EINVAL;
}
if (ret) {
drv_loge("DRM_IOCTL_PRIME_FD_TO_HANDLE failed (fd=%u)\n", prime_handle.fd);
/*
* Need to call GEM close on planes that were opened,
* if any. Adjust the num_planes variable to be the
* plane that failed, so GEM close will be called on
* planes before that plane.
*/
bo->meta.num_planes = plane;
drv_gem_bo_destroy(bo);
if (plane > 0)
drv_gem_close(bo->drv, bo->handle.u32);
return -errno;
}
bo->handles[plane].u32 = prime_handle.handle;
bo->handle.u32 = prime_handle.handle;
}
bo->meta.tiling = data->tiling;
@ -483,7 +474,7 @@ void *drv_dumb_bo_map(struct bo *bo, struct vma *vma, uint32_t map_flags)
struct drm_mode_map_dumb map_dumb;
memset(&map_dumb, 0, sizeof(map_dumb));
map_dumb.handle = bo->handles[0].u32;
map_dumb.handle = bo->handle.u32;
ret = drmIoctl(bo->drv->fd, DRM_IOCTL_MODE_MAP_DUMB, &map_dumb);
if (ret) {

2
drv_priv.h
View file

@ -44,7 +44,7 @@ struct bo {
struct driver *drv;
struct bo_metadata meta;
bool is_test_buffer;
union bo_handle handles[DRV_MAX_PLANES];
union bo_handle handle;
void *priv;
};

18
i915.c
View file

@ -716,7 +716,6 @@ static int i915_bo_compute_metadata(struct bo *bo, uint32_t width, uint32_t heig
static int i915_bo_create_from_metadata(struct bo *bo)
{
int ret;
size_t plane;
uint32_t gem_handle;
struct drm_i915_gem_set_tiling gem_set_tiling = { 0 };
struct i915_device *i915 = bo->drv->priv;
@ -752,21 +751,20 @@ static int i915_bo_create_from_metadata(struct bo *bo)
gem_handle = gem_create.handle;
}
for (plane = 0; plane < bo->meta.num_planes; plane++)
bo->handles[plane].u32 = gem_handle;
bo->handle.u32 = gem_handle;
/* Set/Get tiling ioctl not supported based on fence availability
Refer : "https://patchwork.freedesktop.org/patch/325343/"
*/
if (i915->num_fences_avail) {
gem_set_tiling.handle = bo->handles[0].u32;
gem_set_tiling.handle = bo->handle.u32;
gem_set_tiling.tiling_mode = bo->meta.tiling;
gem_set_tiling.stride = bo->meta.strides[0];
ret = drmIoctl(bo->drv->fd, DRM_IOCTL_I915_GEM_SET_TILING, &gem_set_tiling);
if (ret) {
struct drm_gem_close gem_close = { 0 };
gem_close.handle = bo->handles[0].u32;
gem_close.handle = bo->handle.u32;
drmIoctl(bo->drv->fd, DRM_IOCTL_GEM_CLOSE, &gem_close);
drv_loge("DRM_IOCTL_I915_GEM_SET_TILING failed with %d\n", errno);
@ -800,7 +798,7 @@ static int i915_bo_import(struct bo *bo, struct drv_import_fd_data *data)
*/
if (i915->num_fences_avail) {
/* TODO(gsingh): export modifiers and get rid of backdoor tiling. */
gem_get_tiling.handle = bo->handles[0].u32;
gem_get_tiling.handle = bo->handle.u32;
ret = drmIoctl(bo->drv->fd, DRM_IOCTL_I915_GEM_GET_TILING, &gem_get_tiling);
if (ret) {
@ -827,7 +825,7 @@ static void *i915_bo_map(struct bo *bo, struct vma *vma, uint32_t map_flags)
if (bo->meta.tiling == I915_TILING_NONE) {
if (i915->has_mmap_offset) {
struct drm_i915_gem_mmap_offset gem_map = { 0 };
gem_map.handle = bo->handles[0].u32;
gem_map.handle = bo->handle.u32;
gem_map.flags = I915_MMAP_OFFSET_WB;
/* Get the fake offset back */
@ -850,7 +848,7 @@ static void *i915_bo_map(struct bo *bo, struct vma *vma, uint32_t map_flags)
(BO_USE_RENDERSCRIPT | BO_USE_CAMERA_READ | BO_USE_CAMERA_WRITE)))
gem_map.flags = I915_MMAP_WC;
gem_map.handle = bo->handles[0].u32;
gem_map.handle = bo->handle.u32;
gem_map.offset = 0;
gem_map.size = bo->meta.total_size;
@ -870,7 +868,7 @@ static void *i915_bo_map(struct bo *bo, struct vma *vma, uint32_t map_flags)
if (addr == MAP_FAILED) {
struct drm_i915_gem_mmap_gtt gem_map = { 0 };
gem_map.handle = bo->handles[0].u32;
gem_map.handle = bo->handle.u32;
ret = drmIoctl(bo->drv->fd, DRM_IOCTL_I915_GEM_MMAP_GTT, &gem_map);
if (ret) {
drv_loge("DRM_IOCTL_I915_GEM_MMAP_GTT failed\n");
@ -895,7 +893,7 @@ static int i915_bo_invalidate(struct bo *bo, struct mapping *mapping)
int ret;
struct drm_i915_gem_set_domain set_domain = { 0 };
set_domain.handle = bo->handles[0].u32;
set_domain.handle = bo->handle.u32;
if (bo->meta.tiling == I915_TILING_NONE) {
set_domain.read_domains = I915_GEM_DOMAIN_CPU;
if (mapping->vma->map_flags & BO_MAP_WRITE)

5
mediatek.c
View file

@ -268,8 +268,7 @@ static int mediatek_bo_create_with_modifiers(struct bo *bo, uint32_t width, uint
return -errno;
}
for (plane = 0; plane < bo->meta.num_planes; plane++)
bo->handles[plane].u32 = gem_create.handle;
bo->handle.u32 = gem_create.handle;
return 0;
}
@ -289,7 +288,7 @@ static void *mediatek_bo_map(struct bo *bo, struct vma *vma, uint32_t map_flags)
struct mediatek_private_map_data *priv;
void *addr = NULL;
gem_map.handle = bo->handles[0].u32;
gem_map.handle = bo->handle.u32;
ret = drmIoctl(bo->drv->fd, DRM_IOCTL_MTK_GEM_MAP_OFFSET, &gem_map);
if (ret) {

10
msm.c
View file

@ -296,7 +296,6 @@ static int msm_bo_create_for_modifier(struct bo *bo, uint32_t width, uint32_t he
{
struct drm_msm_gem_new req = { 0 };
int ret;
size_t i;
bo->meta.tiling = (modifier == DRM_FORMAT_MOD_QCOM_COMPRESSED) ? MSM_UBWC_TILING : 0;
msm_calculate_layout(bo);
@ -310,12 +309,7 @@ static int msm_bo_create_for_modifier(struct bo *bo, uint32_t width, uint32_t he
return -errno;
}
/*
* Though we use only one plane, we need to set handle for
* all planes to pass kernel checks
*/
for (i = 0; i < bo->meta.num_planes; i++)
bo->handles[i].u32 = req.handle;
bo->handle.u32 = req.handle;
bo->meta.format_modifier = modifier;
return 0;
@ -360,7 +354,7 @@ static void *msm_bo_map(struct bo *bo, struct vma *vma, uint32_t map_flags)
if (bo->meta.format_modifier)
return MAP_FAILED;
req.handle = bo->handles[0].u32;
req.handle = bo->handle.u32;
ret = drmIoctl(bo->drv->fd, DRM_IOCTL_MSM_GEM_INFO, &req);
if (ret) {
drv_loge("DRM_IOCLT_MSM_GEM_INFO failed with %s\n", strerror(errno));

6
rockchip.c
View file

@ -118,7 +118,6 @@ static int rockchip_bo_create_with_modifiers(struct bo *bo, uint32_t width, uint
uint32_t count)
{
int ret;
size_t plane;
struct drm_rockchip_gem_create gem_create = { 0 };
uint64_t afbc_modifier;
@ -178,8 +177,7 @@ static int rockchip_bo_create_with_modifiers(struct bo *bo, uint32_t width, uint
return -errno;
}
for (plane = 0; plane < bo->meta.num_planes; plane++)
bo->handles[plane].u32 = gem_create.handle;
bo->handle.u32 = gem_create.handle;
return 0;
}
@ -205,7 +203,7 @@ static void *rockchip_bo_map(struct bo *bo, struct vma *vma, uint32_t map_flags)
bo->meta.format_modifier == DRM_FORMAT_MOD_ROCKCHIP_AFBC)
return MAP_FAILED;
gem_map.handle = bo->handles[0].u32;
gem_map.handle = bo->handle.u32;
ret = drmIoctl(bo->drv->fd, DRM_IOCTL_ROCKCHIP_GEM_MAP_OFFSET, &gem_map);
if (ret) {
drv_loge("DRM_IOCTL_ROCKCHIP_GEM_MAP_OFFSET failed\n");

5
vc4.c
View file

@ -74,8 +74,7 @@ static int vc4_bo_create_for_modifier(struct bo *bo, uint32_t width, uint32_t he
return -errno;
}
for (plane = 0; plane < bo->meta.num_planes; plane++)
bo->handles[plane].u32 = bo_create.handle;
bo->handle.u32 = bo_create.handle;
return 0;
}
@ -110,7 +109,7 @@ static void *vc4_bo_map(struct bo *bo, struct vma *vma, uint32_t map_flags)
int ret;
struct drm_vc4_mmap_bo bo_map = { 0 };
bo_map.handle = bo->handles[0].u32;
bo_map.handle = bo->handle.u32;
ret = drmCommandWriteRead(bo->drv->fd, DRM_VC4_MMAP_BO, &bo_map, sizeof(bo_map));
if (ret) {
drv_loge("DRM_VC4_MMAP_BO failed\n");

5
virtgpu_cross_domain.c
View file

@ -404,8 +404,7 @@ static int cross_domain_bo_create(struct bo *bo, uint32_t width, uint32_t height
return -errno;
}
for (uint32_t plane = 0; plane < bo->meta.num_planes; plane++)
bo->handles[plane].u32 = drm_rc_blob.bo_handle;
bo->handle.u32 = drm_rc_blob.bo_handle;
return 0;
}
@ -415,7 +414,7 @@ static void *cross_domain_bo_map(struct bo *bo, struct vma *vma, uint32_t map_fl
int ret;
struct drm_virtgpu_map gem_map = { 0 };
gem_map.handle = bo->handles[0].u32;
gem_map.handle = bo->handle.u32;
ret = drmIoctl(bo->drv->fd, DRM_IOCTL_VIRTGPU_MAP, &gem_map);
if (ret) {
drv_loge("DRM_IOCTL_VIRTGPU_MAP failed with %s\n", strerror(errno));

12
virtgpu_virgl.c
View file

@ -498,8 +498,7 @@ static int virgl_3d_bo_create(struct bo *bo, uint32_t width, uint32_t height, ui
return ret;
}
for (uint32_t plane = 0; plane < bo->meta.num_planes; plane++)
bo->handles[plane].u32 = res_create.bo_handle;
bo->handle.u32 = res_create.bo_handle;
return 0;
}
@ -509,7 +508,7 @@ static void *virgl_3d_bo_map(struct bo *bo, struct vma *vma, uint32_t map_flags)
int ret;
struct drm_virtgpu_map gem_map = { 0 };
gem_map.handle = bo->handles[0].u32;
gem_map.handle = bo->handle.u32;
ret = drmIoctl(bo->drv->fd, DRM_IOCTL_VIRTGPU_MAP, &gem_map);
if (ret) {
drv_loge("DRM_IOCTL_VIRTGPU_MAP failed with %s\n", strerror(errno));
@ -721,8 +720,7 @@ static int virgl_bo_create_blob(struct driver *drv, struct bo *bo)
return -errno;
}
for (uint32_t plane = 0; plane < bo->meta.num_planes; plane++)
bo->handles[plane].u32 = drm_rc_blob.bo_handle;
bo->handle.u32 = drm_rc_blob.bo_handle;
return 0;
}
@ -814,7 +812,7 @@ static bool is_arc_screen_capture_bo(struct bo *bo)
(bo->meta.format != DRM_FORMAT_ABGR8888 && bo->meta.format != DRM_FORMAT_ARGB8888 &&
bo->meta.format != DRM_FORMAT_XRGB8888 && bo->meta.format != DRM_FORMAT_XBGR8888))
return false;
prime_handle.handle = bo->handles[0].u32;
prime_handle.handle = bo->handle.u32;
ret = drmIoctl(bo->drv->fd, DRM_IOCTL_PRIME_HANDLE_TO_FD, &prime_handle);
if (ret < 0)
return false;
@ -1124,7 +1122,7 @@ static int virgl_resource_info(struct bo *bo, uint32_t strides[DRV_MAX_PLANES],
if (!params[param_3d].value)
return 0;
res_info.bo_handle = bo->handles[0].u32;
res_info.bo_handle = bo->handle.u32;
res_info.type = VIRTGPU_RESOURCE_INFO_TYPE_EXTENDED;
ret = drmIoctl(bo->drv->fd, DRM_IOCTL_VIRTGPU_RESOURCE_INFO_CROS, &res_info);
if (ret) {