Merge 'aosp/upstream-master' into HEAD
... to pull in PlaneLayout metadata fix http://crrev.com/c/2503481 Bug: b/171019648 Test: launch_cvd Test: launch_cvd --gpu_mode=gfxstream Change-Id: I9c2a52e2eca3339c024154840cb91f65bb7ed577
This commit is contained in:
commit
42ca6159e5
34 changed files with 172 additions and 659 deletions
24
amdgpu.c
24
amdgpu.c
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@ -422,12 +422,24 @@ static int amdgpu_create_bo_linear(struct bo *bo, uint32_t width, uint32_t heigh
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uint64_t use_flags)
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{
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int ret;
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size_t num_planes;
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uint32_t plane, stride;
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union drm_amdgpu_gem_create gem_create;
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union drm_amdgpu_gem_create gem_create = { { 0 } };
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struct amdgpu_priv *priv = bo->drv->priv;
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stride = drv_stride_from_format(format, width, 0);
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stride = ALIGN(stride, 256);
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num_planes = drv_num_planes_from_format(format);
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/*
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* For multiplane formats, align the stride to 512 to ensure that subsample strides are 256
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* aligned. This uses more memory than necessary since the first plane only needs to be
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* 256 aligned, but it's acceptable for a short-term fix. It's probably safe for other gpu
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* families, but let's restrict it to Raven for now (b/171013552).
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* */
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if (priv->dev_info.family == AMDGPU_FAMILY_RV && num_planes > 1)
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stride = ALIGN(stride, 512);
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else
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stride = ALIGN(stride, 256);
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/*
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* Currently, allocator used by chrome aligns the height for Encoder/
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@ -441,7 +453,6 @@ static int amdgpu_create_bo_linear(struct bo *bo, uint32_t width, uint32_t heigh
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drv_bo_from_format(bo, stride, height, format);
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memset(&gem_create, 0, sizeof(gem_create));
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gem_create.in.bo_size =
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ALIGN(bo->meta.total_size, priv->dev_info.virtual_address_alignment);
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gem_create.in.alignment = 256;
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@ -555,7 +566,7 @@ static void *amdgpu_map_bo(struct bo *bo, struct vma *vma, size_t plane, uint32_
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{
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void *addr = MAP_FAILED;
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int ret;
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union drm_amdgpu_gem_mmap gem_map;
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union drm_amdgpu_gem_mmap gem_map = { { 0 } };
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struct drm_amdgpu_gem_create_in bo_info = { 0 };
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struct drm_amdgpu_gem_op gem_op = { 0 };
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uint32_t handle = bo->handles[plane].u32;
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@ -608,9 +619,7 @@ static void *amdgpu_map_bo(struct bo *bo, struct vma *vma, size_t plane, uint32_
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}
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}
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memset(&gem_map, 0, sizeof(gem_map));
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gem_map.in.handle = handle;
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ret = drmIoctl(bo->drv->fd, DRM_IOCTL_AMDGPU_GEM_MMAP, &gem_map);
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if (ret) {
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drv_log("DRM_IOCTL_AMDGPU_GEM_MMAP failed\n");
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@ -666,12 +675,11 @@ static int amdgpu_unmap_bo(struct bo *bo, struct vma *vma)
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static int amdgpu_bo_invalidate(struct bo *bo, struct mapping *mapping)
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{
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int ret;
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union drm_amdgpu_gem_wait_idle wait_idle;
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union drm_amdgpu_gem_wait_idle wait_idle = { { 0 } };
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if (bo->priv)
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return 0;
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memset(&wait_idle, 0, sizeof(wait_idle));
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wait_idle.in.handle = bo->handles[0].u32;
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wait_idle.in.timeout = AMDGPU_TIMEOUT_INFINITE;
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@ -90,3 +90,10 @@ int32_t cros_gralloc_sync_wait(int32_t fence, bool close_fence)
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return 0;
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}
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std::string get_drm_format_string(uint32_t drm_format)
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{
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char *sequence = (char *)&drm_format;
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std::string s(sequence, 4);
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return "DRM_FOURCC_" + s;
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}
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@ -24,4 +24,6 @@ cros_gralloc_handle_t cros_gralloc_convert_handle(buffer_handle_t handle);
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int32_t cros_gralloc_sync_wait(int32_t fence, bool close_fence);
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std::string get_drm_format_string(uint32_t drm_format);
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#endif
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@ -80,8 +80,9 @@ static uint64_t gralloc0_convert_usage(int usage)
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* rockchip) and usb monitors (evdi/udl). It's complicated so ignore it.
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* */
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use_flags |= BO_USE_NONE;
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/* Map this flag to linear until real HW protection is available on Android. */
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if (usage & GRALLOC_USAGE_PROTECTED)
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use_flags |= BO_USE_PROTECTED;
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use_flags |= BO_USE_LINEAR;
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if (usage & GRALLOC_USAGE_HW_VIDEO_ENCODER) {
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use_flags |= BO_USE_HW_VIDEO_ENCODER;
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/*HACK: See b/30054495 */
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@ -476,7 +476,7 @@ static int test_perform(struct gralloctest_context *ctx)
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CHECK(allocate(ctx->device, &info));
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CHECK(mod->perform(mod, GRALLOC_DRM_GET_STRIDE, info.handle, &stride) == 0);
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CHECK(stride == info.stride);
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CHECK(stride >= info.stride);
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CHECK(mod->perform(mod, GRALLOC_DRM_GET_FORMAT, info.handle, &format) == 0);
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CHECK(format == info.format);
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@ -674,11 +674,12 @@ int main(int argc, char *argv[])
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if (strcmp(tests[i].name, name) && strcmp("all", name))
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continue;
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printf("[ RUN ] gralloctest.%s\n", tests[i].name);
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int success = 1;
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if (ctx->api >= tests[i].required_api)
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success = tests[i].run_test(ctx);
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printf("[ RUN ] gralloctest.%s\n", tests[i].name);
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if (!success) {
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fprintf(stderr, "[ FAILED ] gralloctest.%s\n", tests[i].name);
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ret |= 1;
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@ -54,7 +54,7 @@ Error CrosGralloc3Allocator::allocate(const BufferDescriptorInfo& descriptor, ui
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}
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if (!supported) {
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std::string drmFormatString = getDrmFormatString(crosDescriptor.drm_format);
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std::string drmFormatString = get_drm_format_string(crosDescriptor.drm_format);
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std::string pixelFormatString = getPixelFormatString(descriptor.format);
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std::string usageString = getUsageString(descriptor.usage);
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drv_log("Unsupported combination -- pixel format: %s, drm format:%s, usage: %s\n",
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@ -8,7 +8,9 @@
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#include <cutils/native_handle.h>
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#include "cros_gralloc/cros_gralloc_helpers.h"
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#include "cros_gralloc/gralloc3/CrosGralloc3Utils.h"
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#include "helpers.h"
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using android::hardware::hidl_handle;
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@ -291,7 +293,7 @@ Return<void> CrosGralloc3Mapper::lockYCbCr(void* rawHandle, uint64_t cpuUsage,
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break;
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}
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default: {
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std::string format = getDrmFormatString(crosHandle->format);
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std::string format = get_drm_format_string(crosHandle->format);
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drv_log("Failed to lockYCbCr. Unhandled format: %s\n", format.c_str());
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hidlCb(Error::BAD_BUFFER, ycbcr);
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return Void();
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@ -472,7 +474,7 @@ int CrosGralloc3Mapper::getResolvedDrmFormat(PixelFormat pixelFormat, uint64_t b
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uint32_t resolvedDrmFormat = mDriver->get_resolved_drm_format(drmFormat, usage);
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if (resolvedDrmFormat == DRM_FORMAT_INVALID) {
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std::string drmFormatString = getDrmFormatString(drmFormat);
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std::string drmFormatString = get_drm_format_string(drmFormat);
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drv_log("Failed to getResolvedDrmFormat. Failed to resolve drm format %s\n",
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drmFormatString.c_str());
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return -1;
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@ -25,116 +25,6 @@ using android::hardware::graphics::common::V1_2::PixelFormat;
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using BufferDescriptorInfo =
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android::hardware::graphics::mapper::V3_0::IMapper::BufferDescriptorInfo;
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std::string getDrmFormatString(uint32_t drmFormat) {
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switch (drmFormat) {
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case DRM_FORMAT_ABGR1555:
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return "DRM_FORMAT_ABGR1555";
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case DRM_FORMAT_ABGR2101010:
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return "DRM_FORMAT_ABGR2101010";
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case DRM_FORMAT_ABGR4444:
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return "DRM_FORMAT_ABGR4444";
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case DRM_FORMAT_ABGR8888:
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return "DRM_FORMAT_ABGR8888";
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case DRM_FORMAT_ARGB1555:
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return "DRM_FORMAT_ARGB1555";
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case DRM_FORMAT_ARGB2101010:
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return "DRM_FORMAT_ARGB2101010";
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case DRM_FORMAT_ARGB4444:
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return "DRM_FORMAT_ARGB4444";
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case DRM_FORMAT_ARGB8888:
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return "DRM_FORMAT_ARGB8888";
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case DRM_FORMAT_AYUV:
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return "DRM_FORMAT_AYUV";
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case DRM_FORMAT_BGR233:
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return "DRM_FORMAT_BGR233";
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case DRM_FORMAT_BGR565:
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return "DRM_FORMAT_BGR565";
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case DRM_FORMAT_BGR888:
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return "DRM_FORMAT_BGR888";
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case DRM_FORMAT_BGRA1010102:
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return "DRM_FORMAT_BGRA1010102";
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case DRM_FORMAT_BGRA4444:
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return "DRM_FORMAT_BGRA4444";
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case DRM_FORMAT_BGRA5551:
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return "DRM_FORMAT_BGRA5551";
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case DRM_FORMAT_BGRA8888:
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return "DRM_FORMAT_BGRA8888";
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case DRM_FORMAT_BGRX1010102:
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return "DRM_FORMAT_BGRX1010102";
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case DRM_FORMAT_BGRX4444:
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return "DRM_FORMAT_BGRX4444";
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case DRM_FORMAT_BGRX5551:
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return "DRM_FORMAT_BGRX5551";
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case DRM_FORMAT_BGRX8888:
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return "DRM_FORMAT_BGRX8888";
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case DRM_FORMAT_C8:
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return "DRM_FORMAT_C8";
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case DRM_FORMAT_FLEX_IMPLEMENTATION_DEFINED:
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return "DRM_FORMAT_FLEX_IMPLEMENTATION_DEFINED";
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case DRM_FORMAT_GR88:
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return "DRM_FORMAT_GR88";
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case DRM_FORMAT_NV12:
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return "DRM_FORMAT_NV12";
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case DRM_FORMAT_NV21:
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return "DRM_FORMAT_NV21";
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case DRM_FORMAT_R8:
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return "DRM_FORMAT_R8";
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case DRM_FORMAT_RG88:
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return "DRM_FORMAT_RG88";
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case DRM_FORMAT_RGB332:
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return "DRM_FORMAT_RGB332";
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case DRM_FORMAT_RGB565:
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return "DRM_FORMAT_RGB565";
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case DRM_FORMAT_RGB888:
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return "DRM_FORMAT_RGB888";
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case DRM_FORMAT_RGBA1010102:
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return "DRM_FORMAT_RGBA1010102";
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case DRM_FORMAT_RGBA4444:
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return "DRM_FORMAT_RGBA4444";
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case DRM_FORMAT_RGBA5551:
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return "DRM_FORMAT_RGBA5551";
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case DRM_FORMAT_RGBA8888:
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return "DRM_FORMAT_RGBA8888";
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case DRM_FORMAT_RGBX1010102:
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return "DRM_FORMAT_RGBX1010102";
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case DRM_FORMAT_RGBX4444:
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return "DRM_FORMAT_RGBX4444";
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case DRM_FORMAT_RGBX5551:
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return "DRM_FORMAT_RGBX5551";
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case DRM_FORMAT_RGBX8888:
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return "DRM_FORMAT_RGBX8888";
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case DRM_FORMAT_UYVY:
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return "DRM_FORMAT_UYVY";
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case DRM_FORMAT_VYUY:
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return "DRM_FORMAT_VYUY";
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case DRM_FORMAT_XBGR1555:
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return "DRM_FORMAT_XBGR1555";
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case DRM_FORMAT_XBGR2101010:
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return "DRM_FORMAT_XBGR2101010";
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case DRM_FORMAT_XBGR4444:
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return "DRM_FORMAT_XBGR4444";
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case DRM_FORMAT_XBGR8888:
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return "DRM_FORMAT_XBGR8888";
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case DRM_FORMAT_XRGB1555:
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return "DRM_FORMAT_XRGB1555";
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case DRM_FORMAT_XRGB2101010:
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return "DRM_FORMAT_XRGB2101010";
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case DRM_FORMAT_XRGB4444:
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return "DRM_FORMAT_XRGB4444";
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case DRM_FORMAT_XRGB8888:
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return "DRM_FORMAT_XRGB8888";
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case DRM_FORMAT_YUYV:
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return "DRM_FORMAT_YUYV";
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case DRM_FORMAT_YVU420:
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return "DRM_FORMAT_YVU420";
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case DRM_FORMAT_YVU420_ANDROID:
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return "DRM_FORMAT_YVU420";
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case DRM_FORMAT_YVYU:
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return "DRM_FORMAT_YVYU";
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}
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return android::base::StringPrintf("Unknown(%d)", drmFormat);
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}
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std::string getPixelFormatString(PixelFormat format) {
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switch (format) {
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case PixelFormat::BGRA_8888:
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@ -388,8 +278,9 @@ int convertToBufferUsage(uint64_t grallocUsage, uint64_t* outBufferUsage) {
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/* HWC wants to use display hardware, but can defer to OpenGL. */
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bufferUsage |= BO_USE_SCANOUT | BO_USE_TEXTURE;
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}
|
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/* Map this flag to linear until real HW protection is available on Android. */
|
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if (grallocUsage & BufferUsage::PROTECTED) {
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bufferUsage |= BO_USE_PROTECTED;
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bufferUsage |= BO_USE_LINEAR;
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}
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if (grallocUsage & BufferUsage::COMPOSER_CURSOR) {
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bufferUsage |= BO_USE_NONE;
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@ -504,4 +395,4 @@ std::optional<hidl_vec<uint32_t>> encodeBufferDescriptorInfo(const BufferDescrip
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encoded[3] = static_cast<uint32_t>(info.format);
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encoded[4] = info.usage & std::numeric_limits<uint32_t>::max();
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return std::move(encoded);
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}
|
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}
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|
|
|
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|
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@ -11,8 +11,6 @@
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#include <android/hardware/graphics/common/1.2/types.h>
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#include <android/hardware/graphics/mapper/3.0/IMapper.h>
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std::string getDrmFormatString(uint32_t drmFormat);
|
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std::string getPixelFormatString(android::hardware::graphics::common::V1_2::PixelFormat format);
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|
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std::string getUsageString(
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|
|
|
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|
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@ -53,7 +53,7 @@ Error CrosGralloc4Allocator::allocate(const BufferDescriptorInfo& descriptor, ui
|
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}
|
||||
|
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if (!supported) {
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std::string drmFormatString = getDrmFormatString(crosDescriptor.drm_format);
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std::string drmFormatString = get_drm_format_string(crosDescriptor.drm_format);
|
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std::string pixelFormatString = getPixelFormatString(descriptor.format);
|
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std::string usageString = getUsageString(descriptor.usage);
|
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drv_log("Unsupported combination -- pixel format: %s, drm format:%s, usage: %s\n",
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|
|
|
|||
|
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@ -13,7 +13,9 @@
|
|||
#include <cutils/native_handle.h>
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#include <gralloctypes/Gralloc4.h>
|
||||
|
||||
#include "cros_gralloc/cros_gralloc_helpers.h"
|
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#include "cros_gralloc/gralloc4/CrosGralloc4Utils.h"
|
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|
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#include "helpers.h"
|
||||
|
||||
using aidl::android::hardware::graphics::common::BlendMode;
|
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|
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@ -502,8 +504,8 @@ Return<void> CrosGralloc4Mapper::get(cros_gralloc_handle_t crosHandle,
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planeLayout.offsetInBytes = crosHandle->offsets[plane];
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planeLayout.strideInBytes = crosHandle->strides[plane];
|
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planeLayout.totalSizeInBytes = crosHandle->sizes[plane];
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planeLayout.widthInSamples = crosHandle->width;
|
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planeLayout.heightInSamples = crosHandle->height;
|
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planeLayout.widthInSamples = crosHandle->width / planeLayout.horizontalSubsampling;
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planeLayout.heightInSamples = crosHandle->height / planeLayout.verticalSubsampling;
|
||||
}
|
||||
|
||||
status = android::gralloc4::encodePlaneLayouts(planeLayouts, &encodedMetadata);
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||||
|
|
@ -602,7 +604,7 @@ int CrosGralloc4Mapper::getResolvedDrmFormat(PixelFormat pixelFormat, uint64_t b
|
|||
|
||||
uint32_t resolvedDrmFormat = mDriver->get_resolved_drm_format(drmFormat, usage);
|
||||
if (resolvedDrmFormat == DRM_FORMAT_INVALID) {
|
||||
std::string drmFormatString = getDrmFormatString(drmFormat);
|
||||
std::string drmFormatString = get_drm_format_string(drmFormat);
|
||||
drv_log("Failed to getResolvedDrmFormat. Failed to resolve drm format %s\n",
|
||||
drmFormatString.c_str());
|
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return -1;
|
||||
|
|
|
|||
|
|
@ -29,112 +29,6 @@ using android::hardware::graphics::common::V1_2::PixelFormat;
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|||
using BufferDescriptorInfo =
|
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android::hardware::graphics::mapper::V4_0::IMapper::BufferDescriptorInfo;
|
||||
|
||||
std::string getDrmFormatString(uint32_t drmFormat) {
|
||||
switch (drmFormat) {
|
||||
case DRM_FORMAT_ABGR1555:
|
||||
return "DRM_FORMAT_ABGR1555";
|
||||
case DRM_FORMAT_ABGR2101010:
|
||||
return "DRM_FORMAT_ABGR2101010";
|
||||
case DRM_FORMAT_ABGR4444:
|
||||
return "DRM_FORMAT_ABGR4444";
|
||||
case DRM_FORMAT_ABGR8888:
|
||||
return "DRM_FORMAT_ABGR8888";
|
||||
case DRM_FORMAT_ARGB1555:
|
||||
return "DRM_FORMAT_ARGB1555";
|
||||
case DRM_FORMAT_ARGB2101010:
|
||||
return "DRM_FORMAT_ARGB2101010";
|
||||
case DRM_FORMAT_ARGB4444:
|
||||
return "DRM_FORMAT_ARGB4444";
|
||||
case DRM_FORMAT_ARGB8888:
|
||||
return "DRM_FORMAT_ARGB8888";
|
||||
case DRM_FORMAT_AYUV:
|
||||
return "DRM_FORMAT_AYUV";
|
||||
case DRM_FORMAT_BGR233:
|
||||
return "DRM_FORMAT_BGR233";
|
||||
case DRM_FORMAT_BGR565:
|
||||
return "DRM_FORMAT_BGR565";
|
||||
case DRM_FORMAT_BGR888:
|
||||
return "DRM_FORMAT_BGR888";
|
||||
case DRM_FORMAT_BGRA1010102:
|
||||
return "DRM_FORMAT_BGRA1010102";
|
||||
case DRM_FORMAT_BGRA4444:
|
||||
return "DRM_FORMAT_BGRA4444";
|
||||
case DRM_FORMAT_BGRA5551:
|
||||
return "DRM_FORMAT_BGRA5551";
|
||||
case DRM_FORMAT_BGRA8888:
|
||||
return "DRM_FORMAT_BGRA8888";
|
||||
case DRM_FORMAT_BGRX1010102:
|
||||
return "DRM_FORMAT_BGRX1010102";
|
||||
case DRM_FORMAT_BGRX4444:
|
||||
return "DRM_FORMAT_BGRX4444";
|
||||
case DRM_FORMAT_BGRX5551:
|
||||
return "DRM_FORMAT_BGRX5551";
|
||||
case DRM_FORMAT_BGRX8888:
|
||||
return "DRM_FORMAT_BGRX8888";
|
||||
case DRM_FORMAT_C8:
|
||||
return "DRM_FORMAT_C8";
|
||||
case DRM_FORMAT_GR88:
|
||||
return "DRM_FORMAT_GR88";
|
||||
case DRM_FORMAT_NV12:
|
||||
return "DRM_FORMAT_NV12";
|
||||
case DRM_FORMAT_NV21:
|
||||
return "DRM_FORMAT_NV21";
|
||||
case DRM_FORMAT_R8:
|
||||
return "DRM_FORMAT_R8";
|
||||
case DRM_FORMAT_RG88:
|
||||
return "DRM_FORMAT_RG88";
|
||||
case DRM_FORMAT_RGB332:
|
||||
return "DRM_FORMAT_RGB332";
|
||||
case DRM_FORMAT_RGB565:
|
||||
return "DRM_FORMAT_RGB565";
|
||||
case DRM_FORMAT_RGB888:
|
||||
return "DRM_FORMAT_RGB888";
|
||||
case DRM_FORMAT_RGBA1010102:
|
||||
return "DRM_FORMAT_RGBA1010102";
|
||||
case DRM_FORMAT_RGBA4444:
|
||||
return "DRM_FORMAT_RGBA4444";
|
||||
case DRM_FORMAT_RGBA5551:
|
||||
return "DRM_FORMAT_RGBA5551";
|
||||
case DRM_FORMAT_RGBA8888:
|
||||
return "DRM_FORMAT_RGBA8888";
|
||||
case DRM_FORMAT_RGBX1010102:
|
||||
return "DRM_FORMAT_RGBX1010102";
|
||||
case DRM_FORMAT_RGBX4444:
|
||||
return "DRM_FORMAT_RGBX4444";
|
||||
case DRM_FORMAT_RGBX5551:
|
||||
return "DRM_FORMAT_RGBX5551";
|
||||
case DRM_FORMAT_RGBX8888:
|
||||
return "DRM_FORMAT_RGBX8888";
|
||||
case DRM_FORMAT_UYVY:
|
||||
return "DRM_FORMAT_UYVY";
|
||||
case DRM_FORMAT_VYUY:
|
||||
return "DRM_FORMAT_VYUY";
|
||||
case DRM_FORMAT_XBGR1555:
|
||||
return "DRM_FORMAT_XBGR1555";
|
||||
case DRM_FORMAT_XBGR2101010:
|
||||
return "DRM_FORMAT_XBGR2101010";
|
||||
case DRM_FORMAT_XBGR4444:
|
||||
return "DRM_FORMAT_XBGR4444";
|
||||
case DRM_FORMAT_XBGR8888:
|
||||
return "DRM_FORMAT_XBGR8888";
|
||||
case DRM_FORMAT_XRGB1555:
|
||||
return "DRM_FORMAT_XRGB1555";
|
||||
case DRM_FORMAT_XRGB2101010:
|
||||
return "DRM_FORMAT_XRGB2101010";
|
||||
case DRM_FORMAT_XRGB4444:
|
||||
return "DRM_FORMAT_XRGB4444";
|
||||
case DRM_FORMAT_XRGB8888:
|
||||
return "DRM_FORMAT_XRGB8888";
|
||||
case DRM_FORMAT_YUYV:
|
||||
return "DRM_FORMAT_YUYV";
|
||||
case DRM_FORMAT_YVU420:
|
||||
return "DRM_FORMAT_YVU420";
|
||||
case DRM_FORMAT_YVYU:
|
||||
return "DRM_FORMAT_YVYU";
|
||||
}
|
||||
return android::base::StringPrintf("Unknown(%d)", drmFormat);
|
||||
}
|
||||
|
||||
std::string getPixelFormatString(PixelFormat format) {
|
||||
switch (format) {
|
||||
case PixelFormat::BGRA_8888:
|
||||
|
|
@ -388,8 +282,9 @@ int convertToBufferUsage(uint64_t grallocUsage, uint64_t* outBufferUsage) {
|
|||
/* HWC wants to use display hardware, but can defer to OpenGL. */
|
||||
bufferUsage |= BO_USE_SCANOUT | BO_USE_TEXTURE;
|
||||
}
|
||||
/* Map this flag to linear until real HW protection is available on Android. */
|
||||
if (grallocUsage & BufferUsage::PROTECTED) {
|
||||
bufferUsage |= BO_USE_PROTECTED;
|
||||
bufferUsage |= BO_USE_LINEAR;
|
||||
}
|
||||
if (grallocUsage & BufferUsage::COMPOSER_CURSOR) {
|
||||
bufferUsage |= BO_USE_NONE;
|
||||
|
|
@ -769,4 +664,4 @@ int getPlaneLayouts(uint32_t drmFormat, std::vector<PlaneLayout>* outPlaneLayout
|
|||
|
||||
*outPlaneLayouts = it->second;
|
||||
return 0;
|
||||
}
|
||||
}
|
||||
|
|
|
|||
|
|
@ -13,8 +13,6 @@
|
|||
|
||||
#include "cros_gralloc/cros_gralloc_types.h"
|
||||
|
||||
std::string getDrmFormatString(uint32_t drmFormat);
|
||||
|
||||
std::string getPixelFormatString(android::hardware::graphics::common::V1_2::PixelFormat format);
|
||||
|
||||
std::string getUsageString(
|
||||
|
|
@ -38,4 +36,4 @@ int convertToFenceHandle(int fence_fd, android::hardware::hidl_handle* out_fence
|
|||
|
||||
int getPlaneLayouts(
|
||||
uint32_t drm_format,
|
||||
std::vector<aidl::android::hardware::graphics::common::PlaneLayout>* out_layouts);
|
||||
std::vector<aidl::android::hardware::graphics::common::PlaneLayout>* out_layouts);
|
||||
|
|
|
|||
3
dri.c
3
dri.c
|
|
@ -71,10 +71,9 @@ static bool lookup_extension(const __DRIextension *const *extensions, const char
|
|||
*/
|
||||
static void close_gem_handle(uint32_t handle, int fd)
|
||||
{
|
||||
struct drm_gem_close gem_close;
|
||||
struct drm_gem_close gem_close = { 0 };
|
||||
int ret = 0;
|
||||
|
||||
memset(&gem_close, 0, sizeof(gem_close));
|
||||
gem_close.handle = handle;
|
||||
ret = drmIoctl(fd, DRM_IOCTL_GEM_CLOSE, &gem_close);
|
||||
if (ret)
|
||||
|
|
|
|||
50
drv.c
50
drv.c
|
|
@ -28,44 +28,38 @@
|
|||
#ifdef DRV_AMDGPU
|
||||
extern const struct backend backend_amdgpu;
|
||||
#endif
|
||||
extern const struct backend backend_evdi;
|
||||
#ifdef DRV_EXYNOS
|
||||
extern const struct backend backend_exynos;
|
||||
#endif
|
||||
#ifdef DRV_I915
|
||||
extern const struct backend backend_i915;
|
||||
#endif
|
||||
#ifdef DRV_MARVELL
|
||||
extern const struct backend backend_marvell;
|
||||
#endif
|
||||
#ifdef DRV_MEDIATEK
|
||||
extern const struct backend backend_mediatek;
|
||||
#endif
|
||||
#ifdef DRV_MESON
|
||||
extern const struct backend backend_meson;
|
||||
#endif
|
||||
#ifdef DRV_MSM
|
||||
extern const struct backend backend_msm;
|
||||
#endif
|
||||
extern const struct backend backend_nouveau;
|
||||
#ifdef DRV_RADEON
|
||||
extern const struct backend backend_radeon;
|
||||
#endif
|
||||
#ifdef DRV_ROCKCHIP
|
||||
extern const struct backend backend_rockchip;
|
||||
#endif
|
||||
#ifdef DRV_SYNAPTICS
|
||||
extern const struct backend backend_synaptics;
|
||||
#endif
|
||||
#ifdef DRV_TEGRA
|
||||
extern const struct backend backend_tegra;
|
||||
#endif
|
||||
extern const struct backend backend_udl;
|
||||
#ifdef DRV_VC4
|
||||
extern const struct backend backend_vc4;
|
||||
#endif
|
||||
extern const struct backend backend_vgem;
|
||||
|
||||
// Dumb / generic drivers
|
||||
extern const struct backend backend_evdi;
|
||||
extern const struct backend backend_marvell;
|
||||
extern const struct backend backend_meson;
|
||||
extern const struct backend backend_nouveau;
|
||||
extern const struct backend backend_komeda;
|
||||
extern const struct backend backend_radeon;
|
||||
extern const struct backend backend_synaptics;
|
||||
extern const struct backend backend_virtio_gpu;
|
||||
extern const struct backend backend_udl;
|
||||
|
||||
static const struct backend *drv_get_backend(int fd)
|
||||
{
|
||||
|
|
@ -81,43 +75,26 @@ static const struct backend *drv_get_backend(int fd)
|
|||
#ifdef DRV_AMDGPU
|
||||
&backend_amdgpu,
|
||||
#endif
|
||||
&backend_evdi,
|
||||
#ifdef DRV_EXYNOS
|
||||
&backend_exynos,
|
||||
#endif
|
||||
#ifdef DRV_I915
|
||||
&backend_i915,
|
||||
#endif
|
||||
#ifdef DRV_MARVELL
|
||||
&backend_marvell,
|
||||
#endif
|
||||
#ifdef DRV_MEDIATEK
|
||||
&backend_mediatek,
|
||||
#endif
|
||||
#ifdef DRV_MESON
|
||||
&backend_meson,
|
||||
#endif
|
||||
#ifdef DRV_MSM
|
||||
&backend_msm,
|
||||
#endif
|
||||
&backend_nouveau,
|
||||
#ifdef DRV_RADEON
|
||||
&backend_radeon,
|
||||
#endif
|
||||
#ifdef DRV_ROCKCHIP
|
||||
&backend_rockchip,
|
||||
#endif
|
||||
#ifdef DRV_SYNAPTICS
|
||||
&backend_synaptics,
|
||||
#endif
|
||||
#ifdef DRV_TEGRA
|
||||
&backend_tegra,
|
||||
#endif
|
||||
&backend_udl,
|
||||
#ifdef DRV_VC4
|
||||
&backend_vc4,
|
||||
#endif
|
||||
&backend_vgem, &backend_virtio_gpu,
|
||||
&backend_marvell, &backend_meson, &backend_nouveau, &backend_komeda,
|
||||
&backend_radeon, &backend_synaptics, &backend_virtio_gpu,
|
||||
};
|
||||
|
||||
for (i = 0; i < ARRAY_SIZE(backend_list); i++) {
|
||||
|
|
@ -445,7 +422,7 @@ void *drv_bo_map(struct bo *bo, const struct rectangle *rect, uint32_t map_flags
|
|||
{
|
||||
uint32_t i;
|
||||
uint8_t *addr;
|
||||
struct mapping mapping;
|
||||
struct mapping mapping = { 0 };
|
||||
|
||||
assert(rect->width >= 0);
|
||||
assert(rect->height >= 0);
|
||||
|
|
@ -459,7 +436,6 @@ void *drv_bo_map(struct bo *bo, const struct rectangle *rect, uint32_t map_flags
|
|||
return MAP_FAILED;
|
||||
}
|
||||
|
||||
memset(&mapping, 0, sizeof(mapping));
|
||||
mapping.rect = *rect;
|
||||
mapping.refcount = 1;
|
||||
|
||||
|
|
|
|||
16
drv_priv.h
16
drv_priv.h
|
|
@ -85,19 +85,19 @@ struct backend {
|
|||
};
|
||||
|
||||
// clang-format off
|
||||
#define BO_USE_RENDER_MASK (BO_USE_LINEAR | BO_USE_PROTECTED | BO_USE_RENDERING | \
|
||||
BO_USE_RENDERSCRIPT | BO_USE_SW_READ_OFTEN | BO_USE_SW_WRITE_OFTEN | \
|
||||
BO_USE_SW_READ_RARELY | BO_USE_SW_WRITE_RARELY | BO_USE_TEXTURE)
|
||||
#define BO_USE_RENDER_MASK (BO_USE_LINEAR | BO_USE_RENDERING | BO_USE_RENDERSCRIPT | \
|
||||
BO_USE_SW_READ_OFTEN | BO_USE_SW_WRITE_OFTEN | BO_USE_SW_READ_RARELY | \
|
||||
BO_USE_SW_WRITE_RARELY | BO_USE_TEXTURE)
|
||||
|
||||
#define BO_USE_TEXTURE_MASK (BO_USE_LINEAR | BO_USE_PROTECTED | BO_USE_RENDERSCRIPT | \
|
||||
BO_USE_SW_READ_OFTEN | BO_USE_SW_WRITE_OFTEN | \
|
||||
BO_USE_SW_READ_RARELY | BO_USE_SW_WRITE_RARELY | BO_USE_TEXTURE)
|
||||
#define BO_USE_TEXTURE_MASK (BO_USE_LINEAR | BO_USE_RENDERSCRIPT | BO_USE_SW_READ_OFTEN | \
|
||||
BO_USE_SW_WRITE_OFTEN | BO_USE_SW_READ_RARELY | \
|
||||
BO_USE_SW_WRITE_RARELY | BO_USE_TEXTURE)
|
||||
|
||||
#define BO_USE_SW_MASK (BO_USE_SW_READ_OFTEN | BO_USE_SW_WRITE_OFTEN | \
|
||||
BO_USE_SW_READ_RARELY | BO_USE_SW_WRITE_RARELY)
|
||||
BO_USE_SW_READ_RARELY | BO_USE_SW_WRITE_RARELY)
|
||||
|
||||
#define BO_USE_NON_GPU_HW (BO_USE_SCANOUT | BO_USE_CAMERA_WRITE | BO_USE_CAMERA_READ | \
|
||||
BO_USE_HW_VIDEO_ENCODER | BO_USE_HW_VIDEO_DECODER)
|
||||
BO_USE_HW_VIDEO_ENCODER | BO_USE_HW_VIDEO_DECODER)
|
||||
|
||||
#ifndef DRM_FORMAT_MOD_LINEAR
|
||||
#define DRM_FORMAT_MOD_LINEAR DRM_FORMAT_MOD_NONE
|
||||
|
|
|
|||
|
|
@ -1,15 +1,24 @@
|
|||
/*
|
||||
* Copyright 2018 The Chromium OS Authors. All rights reserved.
|
||||
* Copyright 2020 The Chromium OS Authors. All rights reserved.
|
||||
* Use of this source code is governed by a BSD-style license that can be
|
||||
* found in the LICENSE file.
|
||||
*/
|
||||
|
||||
#ifdef DRV_MESON
|
||||
|
||||
#include "drv_priv.h"
|
||||
#include "helpers.h"
|
||||
#include "util.h"
|
||||
|
||||
#define INIT_DUMB_DRIVER(driver) \
|
||||
const struct backend backend_##driver = { \
|
||||
.name = #driver, \
|
||||
.init = dumb_driver_init, \
|
||||
.bo_create = drv_dumb_bo_create, \
|
||||
.bo_destroy = drv_dumb_bo_destroy, \
|
||||
.bo_import = drv_prime_bo_import, \
|
||||
.bo_map = drv_dumb_bo_map, \
|
||||
.bo_unmap = drv_bo_munmap, \
|
||||
};
|
||||
|
||||
static const uint32_t scanout_render_formats[] = { DRM_FORMAT_ARGB8888, DRM_FORMAT_XRGB8888,
|
||||
DRM_FORMAT_ABGR8888, DRM_FORMAT_XBGR8888,
|
||||
DRM_FORMAT_BGR888, DRM_FORMAT_BGR565 };
|
||||
|
|
@ -17,7 +26,7 @@ static const uint32_t scanout_render_formats[] = { DRM_FORMAT_ARGB8888, DRM_FORM
|
|||
static const uint32_t texture_only_formats[] = { DRM_FORMAT_NV12, DRM_FORMAT_NV21,
|
||||
DRM_FORMAT_YVU420, DRM_FORMAT_YVU420_ANDROID };
|
||||
|
||||
static int meson_init(struct driver *drv)
|
||||
static int dumb_driver_init(struct driver *drv)
|
||||
{
|
||||
drv_add_combinations(drv, scanout_render_formats, ARRAY_SIZE(scanout_render_formats),
|
||||
&LINEAR_METADATA, BO_USE_RENDER_MASK | BO_USE_SCANOUT);
|
||||
|
|
@ -33,14 +42,9 @@ static int meson_init(struct driver *drv)
|
|||
return drv_modify_linear_combinations(drv);
|
||||
}
|
||||
|
||||
const struct backend backend_meson = {
|
||||
.name = "meson",
|
||||
.init = meson_init,
|
||||
.bo_create = drv_dumb_bo_create,
|
||||
.bo_destroy = drv_dumb_bo_destroy,
|
||||
.bo_import = drv_prime_bo_import,
|
||||
.bo_map = drv_dumb_bo_map,
|
||||
.bo_unmap = drv_bo_munmap,
|
||||
};
|
||||
|
||||
#endif
|
||||
INIT_DUMB_DRIVER(komeda)
|
||||
INIT_DUMB_DRIVER(marvell)
|
||||
INIT_DUMB_DRIVER(meson)
|
||||
INIT_DUMB_DRIVER(nouveau)
|
||||
INIT_DUMB_DRIVER(radeon)
|
||||
INIT_DUMB_DRIVER(synaptics)
|
||||
29
evdi.c
29
evdi.c
|
|
@ -1,29 +0,0 @@
|
|||
/*
|
||||
* Copyright 2016 The Chromium OS Authors. All rights reserved.
|
||||
* Use of this source code is governed by a BSD-style license that can be
|
||||
* found in the LICENSE file.
|
||||
*/
|
||||
|
||||
#include "drv_priv.h"
|
||||
#include "helpers.h"
|
||||
#include "util.h"
|
||||
|
||||
static const uint32_t render_target_formats[] = { DRM_FORMAT_ARGB8888, DRM_FORMAT_XRGB8888 };
|
||||
|
||||
static int evdi_init(struct driver *drv)
|
||||
{
|
||||
drv_add_combinations(drv, render_target_formats, ARRAY_SIZE(render_target_formats),
|
||||
&LINEAR_METADATA, BO_USE_RENDER_MASK);
|
||||
|
||||
return drv_modify_linear_combinations(drv);
|
||||
}
|
||||
|
||||
const struct backend backend_evdi = {
|
||||
.name = "evdi",
|
||||
.init = evdi_init,
|
||||
.bo_create = drv_dumb_bo_create,
|
||||
.bo_destroy = drv_dumb_bo_destroy,
|
||||
.bo_import = drv_prime_bo_import,
|
||||
.bo_map = drv_dumb_bo_map,
|
||||
.bo_unmap = drv_bo_munmap,
|
||||
};
|
||||
7
exynos.c
7
exynos.c
|
|
@ -64,9 +64,8 @@ static int exynos_bo_create(struct bo *bo, uint32_t width, uint32_t height, uint
|
|||
int ret;
|
||||
for (plane = 0; plane < bo->meta.num_planes; plane++) {
|
||||
size_t size = bo->meta.sizes[plane];
|
||||
struct drm_exynos_gem_create gem_create;
|
||||
struct drm_exynos_gem_create gem_create = { 0 };
|
||||
|
||||
memset(&gem_create, 0, sizeof(gem_create));
|
||||
gem_create.size = size;
|
||||
gem_create.flags = EXYNOS_BO_NONCONTIG;
|
||||
|
||||
|
|
@ -84,8 +83,8 @@ static int exynos_bo_create(struct bo *bo, uint32_t width, uint32_t height, uint
|
|||
|
||||
cleanup_planes:
|
||||
for (; plane != 0; plane--) {
|
||||
struct drm_gem_close gem_close;
|
||||
memset(&gem_close, 0, sizeof(gem_close));
|
||||
struct drm_gem_close gem_close = { 0 };
|
||||
|
||||
gem_close.handle = bo->handles[plane - 1].u32;
|
||||
int gem_close_ret = drmIoctl(bo->drv->fd, DRM_IOCTL_GEM_CLOSE, &gem_close);
|
||||
if (gem_close_ret) {
|
||||
|
|
|
|||
3
gbm.c
3
gbm.c
|
|
@ -194,13 +194,12 @@ PUBLIC struct gbm_bo *gbm_bo_import(struct gbm_device *gbm, uint32_t type, void
|
|||
uint32_t usage)
|
||||
{
|
||||
struct gbm_bo *bo;
|
||||
struct drv_import_fd_data drv_data;
|
||||
struct drv_import_fd_data drv_data = { 0 };
|
||||
struct gbm_import_fd_data *fd_data = buffer;
|
||||
struct gbm_import_fd_modifier_data *fd_modifier_data = buffer;
|
||||
uint32_t gbm_format;
|
||||
size_t num_planes, i, num_fds;
|
||||
|
||||
memset(&drv_data, 0, sizeof(drv_data));
|
||||
drv_data.use_flags = gbm_convert_usage(usage);
|
||||
switch (type) {
|
||||
case GBM_BO_IMPORT_FD:
|
||||
|
|
|
|||
|
|
@ -312,7 +312,7 @@ int drv_dumb_bo_create_ex(struct bo *bo, uint32_t width, uint32_t height, uint32
|
|||
int ret;
|
||||
size_t plane;
|
||||
uint32_t aligned_width, aligned_height;
|
||||
struct drm_mode_create_dumb create_dumb;
|
||||
struct drm_mode_create_dumb create_dumb = { 0 };
|
||||
|
||||
aligned_width = width;
|
||||
aligned_height = height;
|
||||
|
|
@ -345,7 +345,6 @@ int drv_dumb_bo_create_ex(struct bo *bo, uint32_t width, uint32_t height, uint32
|
|||
break;
|
||||
}
|
||||
|
||||
memset(&create_dumb, 0, sizeof(create_dumb));
|
||||
if (quirks & BO_QUIRK_DUMB32BPP) {
|
||||
aligned_width =
|
||||
DIV_ROUND_UP(aligned_width * layout_from_format(format)->bytes_per_pixel[0], 4);
|
||||
|
|
@ -380,12 +379,10 @@ int drv_dumb_bo_create(struct bo *bo, uint32_t width, uint32_t height, uint32_t
|
|||
|
||||
int drv_dumb_bo_destroy(struct bo *bo)
|
||||
{
|
||||
struct drm_mode_destroy_dumb destroy_dumb;
|
||||
int ret;
|
||||
struct drm_mode_destroy_dumb destroy_dumb = { 0 };
|
||||
|
||||
memset(&destroy_dumb, 0, sizeof(destroy_dumb));
|
||||
destroy_dumb.handle = bo->handles[0].u32;
|
||||
|
||||
ret = drmIoctl(bo->drv->fd, DRM_IOCTL_MODE_DESTROY_DUMB, &destroy_dumb);
|
||||
if (ret) {
|
||||
drv_log("DRM_IOCTL_MODE_DESTROY_DUMB failed (handle=%x)\n", bo->handles[0].u32);
|
||||
|
|
|
|||
42
i915.c
42
i915.c
|
|
@ -57,7 +57,9 @@ static uint32_t i915_get_gen(int device_id)
|
|||
const uint16_t gen3_ids[] = { 0x2582, 0x2592, 0x2772, 0x27A2, 0x27AE,
|
||||
0x29C2, 0x29B2, 0x29D2, 0xA001, 0xA011 };
|
||||
const uint16_t gen11_ids[] = { 0x4E71, 0x4E61, 0x4E51, 0x4E55, 0x4E57 };
|
||||
|
||||
const uint16_t gen12_ids[] = { 0x9A40, 0x9A49, 0x9A59, 0x9A60, 0x9A68,
|
||||
0x9A70, 0x9A78, 0x9AC0, 0x9AC9, 0x9AD9,
|
||||
0x9AF8 };
|
||||
unsigned i;
|
||||
for (i = 0; i < ARRAY_SIZE(gen3_ids); i++)
|
||||
if (gen3_ids[i] == device_id)
|
||||
|
|
@ -67,6 +69,11 @@ static uint32_t i915_get_gen(int device_id)
|
|||
if (gen11_ids[i] == device_id)
|
||||
return 11;
|
||||
|
||||
/* Gen 12 */
|
||||
for (i = 0; i < ARRAY_SIZE(gen12_ids); i++)
|
||||
if (gen12_ids[i] == device_id)
|
||||
return 12;
|
||||
|
||||
return 4;
|
||||
}
|
||||
|
||||
|
|
@ -95,8 +102,8 @@ static int i915_add_combinations(struct driver *drv)
|
|||
scanout_and_render = BO_USE_RENDER_MASK | BO_USE_SCANOUT;
|
||||
render = BO_USE_RENDER_MASK;
|
||||
texture_only = BO_USE_TEXTURE_MASK;
|
||||
uint64_t linear_mask = BO_USE_RENDERSCRIPT | BO_USE_LINEAR | BO_USE_PROTECTED |
|
||||
BO_USE_SW_READ_OFTEN | BO_USE_SW_WRITE_OFTEN;
|
||||
uint64_t linear_mask =
|
||||
BO_USE_RENDERSCRIPT | BO_USE_LINEAR | BO_USE_SW_READ_OFTEN | BO_USE_SW_WRITE_OFTEN;
|
||||
|
||||
metadata.tiling = I915_TILING_NONE;
|
||||
metadata.priority = 1;
|
||||
|
|
@ -234,13 +241,12 @@ static int i915_init(struct driver *drv)
|
|||
int ret;
|
||||
int device_id;
|
||||
struct i915_device *i915;
|
||||
drm_i915_getparam_t get_param;
|
||||
drm_i915_getparam_t get_param = { 0 };
|
||||
|
||||
i915 = calloc(1, sizeof(*i915));
|
||||
if (!i915)
|
||||
return -ENOMEM;
|
||||
|
||||
memset(&get_param, 0, sizeof(get_param));
|
||||
get_param.param = I915_PARAM_CHIPSET_ID;
|
||||
get_param.value = &device_id;
|
||||
ret = drmIoctl(drv->fd, DRM_IOCTL_I915_GETPARAM, &get_param);
|
||||
|
|
@ -303,7 +309,7 @@ static int i915_bo_compute_metadata(struct bo *bo, uint32_t width, uint32_t heig
|
|||
{
|
||||
uint64_t modifier;
|
||||
struct i915_device *i915 = bo->drv->priv;
|
||||
bool huge_bo = (i915->gen <= 11) && (width > 4096);
|
||||
bool huge_bo = (i915->gen < 11) && (width > 4096);
|
||||
|
||||
if (modifiers) {
|
||||
modifier =
|
||||
|
|
@ -407,12 +413,10 @@ static int i915_bo_create_from_metadata(struct bo *bo)
|
|||
{
|
||||
int ret;
|
||||
size_t plane;
|
||||
struct drm_i915_gem_create gem_create;
|
||||
struct drm_i915_gem_set_tiling gem_set_tiling;
|
||||
struct drm_i915_gem_create gem_create = { 0 };
|
||||
struct drm_i915_gem_set_tiling gem_set_tiling = { 0 };
|
||||
|
||||
memset(&gem_create, 0, sizeof(gem_create));
|
||||
gem_create.size = bo->meta.total_size;
|
||||
|
||||
ret = drmIoctl(bo->drv->fd, DRM_IOCTL_I915_GEM_CREATE, &gem_create);
|
||||
if (ret) {
|
||||
drv_log("DRM_IOCTL_I915_GEM_CREATE failed (size=%llu)\n", gem_create.size);
|
||||
|
|
@ -422,15 +426,13 @@ static int i915_bo_create_from_metadata(struct bo *bo)
|
|||
for (plane = 0; plane < bo->meta.num_planes; plane++)
|
||||
bo->handles[plane].u32 = gem_create.handle;
|
||||
|
||||
memset(&gem_set_tiling, 0, sizeof(gem_set_tiling));
|
||||
gem_set_tiling.handle = bo->handles[0].u32;
|
||||
gem_set_tiling.tiling_mode = bo->meta.tiling;
|
||||
gem_set_tiling.stride = bo->meta.strides[0];
|
||||
|
||||
ret = drmIoctl(bo->drv->fd, DRM_IOCTL_I915_GEM_SET_TILING, &gem_set_tiling);
|
||||
if (ret) {
|
||||
struct drm_gem_close gem_close;
|
||||
memset(&gem_close, 0, sizeof(gem_close));
|
||||
struct drm_gem_close gem_close = { 0 };
|
||||
gem_close.handle = bo->handles[0].u32;
|
||||
drmIoctl(bo->drv->fd, DRM_IOCTL_GEM_CLOSE, &gem_close);
|
||||
|
||||
|
|
@ -450,14 +452,13 @@ static void i915_close(struct driver *drv)
|
|||
static int i915_bo_import(struct bo *bo, struct drv_import_fd_data *data)
|
||||
{
|
||||
int ret;
|
||||
struct drm_i915_gem_get_tiling gem_get_tiling;
|
||||
struct drm_i915_gem_get_tiling gem_get_tiling = { 0 };
|
||||
|
||||
ret = drv_prime_bo_import(bo, data);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
/* TODO(gsingh): export modifiers and get rid of backdoor tiling. */
|
||||
memset(&gem_get_tiling, 0, sizeof(gem_get_tiling));
|
||||
gem_get_tiling.handle = bo->handles[0].u32;
|
||||
|
||||
ret = drmIoctl(bo->drv->fd, DRM_IOCTL_I915_GEM_GET_TILING, &gem_get_tiling);
|
||||
|
|
@ -480,9 +481,7 @@ static void *i915_bo_map(struct bo *bo, struct vma *vma, size_t plane, uint32_t
|
|||
return MAP_FAILED;
|
||||
|
||||
if (bo->meta.tiling == I915_TILING_NONE) {
|
||||
struct drm_i915_gem_mmap gem_map;
|
||||
memset(&gem_map, 0, sizeof(gem_map));
|
||||
|
||||
struct drm_i915_gem_mmap gem_map = { 0 };
|
||||
/* TODO(b/118799155): We don't seem to have a good way to
|
||||
* detect the use cases for which WC mapping is really needed.
|
||||
* The current heuristic seems overly coarse and may be slowing
|
||||
|
|
@ -508,11 +507,9 @@ static void *i915_bo_map(struct bo *bo, struct vma *vma, size_t plane, uint32_t
|
|||
|
||||
addr = (void *)(uintptr_t)gem_map.addr_ptr;
|
||||
} else {
|
||||
struct drm_i915_gem_mmap_gtt gem_map;
|
||||
memset(&gem_map, 0, sizeof(gem_map));
|
||||
struct drm_i915_gem_mmap_gtt gem_map = { 0 };
|
||||
|
||||
gem_map.handle = bo->handles[0].u32;
|
||||
|
||||
ret = drmIoctl(bo->drv->fd, DRM_IOCTL_I915_GEM_MMAP_GTT, &gem_map);
|
||||
if (ret) {
|
||||
drv_log("DRM_IOCTL_I915_GEM_MMAP_GTT failed\n");
|
||||
|
|
@ -535,9 +532,8 @@ static void *i915_bo_map(struct bo *bo, struct vma *vma, size_t plane, uint32_t
|
|||
static int i915_bo_invalidate(struct bo *bo, struct mapping *mapping)
|
||||
{
|
||||
int ret;
|
||||
struct drm_i915_gem_set_domain set_domain;
|
||||
struct drm_i915_gem_set_domain set_domain = { 0 };
|
||||
|
||||
memset(&set_domain, 0, sizeof(set_domain));
|
||||
set_domain.handle = bo->handles[0].u32;
|
||||
if (bo->meta.tiling == I915_TILING_NONE) {
|
||||
set_domain.read_domains = I915_GEM_DOMAIN_CPU;
|
||||
|
|
|
|||
34
marvell.c
34
marvell.c
|
|
@ -1,34 +0,0 @@
|
|||
/*
|
||||
* Copyright 2015 The Chromium OS Authors. All rights reserved.
|
||||
* Use of this source code is governed by a BSD-style license that can be
|
||||
* found in the LICENSE file.
|
||||
*/
|
||||
|
||||
#ifdef DRV_MARVELL
|
||||
|
||||
#include "drv_priv.h"
|
||||
#include "helpers.h"
|
||||
#include "util.h"
|
||||
|
||||
static const uint32_t render_target_formats[] = { DRM_FORMAT_ARGB8888, DRM_FORMAT_XRGB8888 };
|
||||
|
||||
static int marvell_init(struct driver *drv)
|
||||
{
|
||||
drv_add_combinations(drv, render_target_formats, ARRAY_SIZE(render_target_formats),
|
||||
&LINEAR_METADATA, BO_USE_RENDER_MASK);
|
||||
|
||||
return drv_add_linear_combinations(drv, render_target_formats,
|
||||
ARRAY_SIZE(render_target_formats));
|
||||
}
|
||||
|
||||
const struct backend backend_marvell = {
|
||||
.name = "marvell",
|
||||
.init = marvell_init,
|
||||
.bo_create = drv_dumb_bo_create,
|
||||
.bo_destroy = drv_dumb_bo_destroy,
|
||||
.bo_import = drv_prime_bo_import,
|
||||
.bo_map = drv_dumb_bo_map,
|
||||
.bo_unmap = drv_bo_munmap,
|
||||
};
|
||||
|
||||
#endif
|
||||
|
|
@ -54,8 +54,7 @@ static int mediatek_init(struct driver *drv)
|
|||
drv_add_combinations(drv, texture_source_formats, ARRAY_SIZE(texture_source_formats),
|
||||
&LINEAR_METADATA, BO_USE_TEXTURE_MASK);
|
||||
|
||||
drv_add_combination(drv, DRM_FORMAT_R8, &LINEAR_METADATA,
|
||||
BO_USE_SW_MASK | BO_USE_LINEAR | BO_USE_PROTECTED);
|
||||
drv_add_combination(drv, DRM_FORMAT_R8, &LINEAR_METADATA, BO_USE_SW_MASK | BO_USE_LINEAR);
|
||||
|
||||
/* Android CTS tests require this. */
|
||||
drv_add_combination(drv, DRM_FORMAT_BGR888, &LINEAR_METADATA, BO_USE_SW_MASK);
|
||||
|
|
@ -107,7 +106,7 @@ static int mediatek_bo_create_with_modifiers(struct bo *bo, uint32_t width, uint
|
|||
int ret;
|
||||
size_t plane;
|
||||
uint32_t stride;
|
||||
struct drm_mtk_gem_create gem_create;
|
||||
struct drm_mtk_gem_create gem_create = { 0 };
|
||||
|
||||
if (!drv_has_modifier(modifiers, count, DRM_FORMAT_MOD_LINEAR)) {
|
||||
errno = EINVAL;
|
||||
|
|
@ -146,7 +145,6 @@ static int mediatek_bo_create_with_modifiers(struct bo *bo, uint32_t width, uint
|
|||
drv_bo_from_format(bo, stride, height, format);
|
||||
}
|
||||
|
||||
memset(&gem_create, 0, sizeof(gem_create));
|
||||
gem_create.size = bo->meta.total_size;
|
||||
|
||||
ret = drmIoctl(bo->drv->fd, DRM_IOCTL_MTK_GEM_CREATE, &gem_create);
|
||||
|
|
@ -172,10 +170,9 @@ static int mediatek_bo_create(struct bo *bo, uint32_t width, uint32_t height, ui
|
|||
static void *mediatek_bo_map(struct bo *bo, struct vma *vma, size_t plane, uint32_t map_flags)
|
||||
{
|
||||
int ret, prime_fd;
|
||||
struct drm_mtk_gem_map_off gem_map;
|
||||
struct drm_mtk_gem_map_off gem_map = { 0 };
|
||||
struct mediatek_private_map_data *priv;
|
||||
|
||||
memset(&gem_map, 0, sizeof(gem_map));
|
||||
gem_map.handle = bo->handles[0].u32;
|
||||
|
||||
ret = drmIoctl(bo->drv->fd, DRM_IOCTL_MTK_GEM_MAP_OFFSET, &gem_map);
|
||||
|
|
|
|||
17
msm.c
17
msm.c
|
|
@ -84,7 +84,7 @@ static void msm_calculate_layout(struct bo *bo)
|
|||
uv_stride = ALIGN(width, VENUS_STRIDE_ALIGN);
|
||||
y_scanline = ALIGN(height, VENUS_SCANLINE_ALIGN * 2);
|
||||
uv_scanline = ALIGN(DIV_ROUND_UP(height, 2),
|
||||
VENUS_SCANLINE_ALIGN * (bo->meta.tiling ? 2 : 1));
|
||||
VENUS_SCANLINE_ALIGN * (bo->meta.tiling ? 2 : 1));
|
||||
y_plane = y_stride * y_scanline;
|
||||
uv_plane = uv_stride * uv_scanline;
|
||||
|
||||
|
|
@ -189,8 +189,7 @@ static int msm_init(struct driver *drv)
|
|||
struct format_metadata metadata;
|
||||
uint64_t render_use_flags = BO_USE_RENDER_MASK | BO_USE_SCANOUT;
|
||||
uint64_t texture_use_flags = BO_USE_TEXTURE_MASK | BO_USE_HW_VIDEO_DECODER;
|
||||
uint64_t sw_flags = (BO_USE_RENDERSCRIPT | BO_USE_SW_MASK |
|
||||
BO_USE_LINEAR | BO_USE_PROTECTED);
|
||||
uint64_t sw_flags = (BO_USE_RENDERSCRIPT | BO_USE_SW_MASK | BO_USE_LINEAR);
|
||||
|
||||
drv_add_combinations(drv, render_target_formats, ARRAY_SIZE(render_target_formats),
|
||||
&LINEAR_METADATA, render_use_flags);
|
||||
|
|
@ -233,21 +232,23 @@ static int msm_init(struct driver *drv)
|
|||
msm_add_ubwc_combinations(drv, texture_source_formats, ARRAY_SIZE(texture_source_formats),
|
||||
&metadata, texture_use_flags);
|
||||
|
||||
drv_modify_combination(drv, DRM_FORMAT_NV12, &metadata,
|
||||
BO_USE_CAMERA_READ | BO_USE_CAMERA_WRITE | BO_USE_SCANOUT |
|
||||
BO_USE_HW_VIDEO_ENCODER);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int msm_bo_create_for_modifier(struct bo *bo, uint32_t width, uint32_t height,
|
||||
uint32_t format, const uint64_t modifier)
|
||||
{
|
||||
struct drm_msm_gem_new req;
|
||||
struct drm_msm_gem_new req = { 0 };
|
||||
int ret;
|
||||
size_t i;
|
||||
|
||||
bo->meta.tiling = (modifier == DRM_FORMAT_MOD_QCOM_COMPRESSED) ? MSM_UBWC_TILING : 0;
|
||||
|
||||
msm_calculate_layout(bo);
|
||||
|
||||
memset(&req, 0, sizeof(req));
|
||||
req.flags = MSM_BO_WC | MSM_BO_SCANOUT;
|
||||
req.size = bo->meta.total_size;
|
||||
|
||||
|
|
@ -300,11 +301,9 @@ static int msm_bo_create(struct bo *bo, uint32_t width, uint32_t height, uint32_
|
|||
static void *msm_bo_map(struct bo *bo, struct vma *vma, size_t plane, uint32_t map_flags)
|
||||
{
|
||||
int ret;
|
||||
struct drm_msm_gem_info req;
|
||||
struct drm_msm_gem_info req = { 0 };
|
||||
|
||||
memset(&req, 0, sizeof(req));
|
||||
req.handle = bo->handles[0].u32;
|
||||
|
||||
ret = drmIoctl(bo->drv->fd, DRM_IOCTL_MSM_GEM_INFO, &req);
|
||||
if (ret) {
|
||||
drv_log("DRM_IOCLT_MSM_GEM_INFO failed with %s\n", strerror(errno));
|
||||
|
|
|
|||
29
nouveau.c
29
nouveau.c
|
|
@ -1,29 +0,0 @@
|
|||
/*
|
||||
* Copyright 2016 The Chromium OS Authors. All rights reserved.
|
||||
* Use of this source code is governed by a BSD-style license that can be
|
||||
* found in the LICENSE file.
|
||||
*/
|
||||
|
||||
#include "drv_priv.h"
|
||||
#include "helpers.h"
|
||||
#include "util.h"
|
||||
|
||||
static const uint32_t render_target_formats[] = { DRM_FORMAT_ARGB8888, DRM_FORMAT_XRGB8888 };
|
||||
|
||||
static int nouveau_init(struct driver *drv)
|
||||
{
|
||||
drv_add_combinations(drv, render_target_formats, ARRAY_SIZE(render_target_formats),
|
||||
&LINEAR_METADATA, BO_USE_RENDER_MASK);
|
||||
|
||||
return drv_modify_linear_combinations(drv);
|
||||
}
|
||||
|
||||
const struct backend backend_nouveau = {
|
||||
.name = "nouveau",
|
||||
.init = nouveau_init,
|
||||
.bo_create = drv_dumb_bo_create,
|
||||
.bo_destroy = drv_dumb_bo_destroy,
|
||||
.bo_import = drv_prime_bo_import,
|
||||
.bo_map = drv_dumb_bo_map,
|
||||
.bo_unmap = drv_bo_munmap,
|
||||
};
|
||||
29
radeon.c
29
radeon.c
|
|
@ -1,29 +0,0 @@
|
|||
/*
|
||||
* Copyright 2017 The Chromium OS Authors. All rights reserved.
|
||||
* Use of this source code is governed by a BSD-style license that can be
|
||||
* found in the LICENSE file.
|
||||
*/
|
||||
|
||||
#include "drv_priv.h"
|
||||
#include "helpers.h"
|
||||
#include "util.h"
|
||||
|
||||
static const uint32_t render_target_formats[] = { DRM_FORMAT_ARGB8888, DRM_FORMAT_XRGB8888 };
|
||||
|
||||
static int radeon_init(struct driver *drv)
|
||||
{
|
||||
drv_add_combinations(drv, render_target_formats, ARRAY_SIZE(render_target_formats),
|
||||
&LINEAR_METADATA, BO_USE_RENDER_MASK);
|
||||
|
||||
return drv_modify_linear_combinations(drv);
|
||||
}
|
||||
|
||||
const struct backend backend_radeon = {
|
||||
.name = "radeon",
|
||||
.init = radeon_init,
|
||||
.bo_create = drv_dumb_bo_create,
|
||||
.bo_destroy = drv_dumb_bo_destroy,
|
||||
.bo_import = drv_prime_bo_import,
|
||||
.bo_map = drv_dumb_bo_map,
|
||||
.bo_unmap = drv_bo_munmap,
|
||||
};
|
||||
11
rockchip.c
11
rockchip.c
|
|
@ -101,8 +101,7 @@ static int rockchip_init(struct driver *drv)
|
|||
*/
|
||||
drv_add_combination(drv, DRM_FORMAT_R8, &metadata,
|
||||
BO_USE_CAMERA_READ | BO_USE_CAMERA_WRITE | BO_USE_SW_MASK |
|
||||
BO_USE_LINEAR | BO_USE_PROTECTED | BO_USE_HW_VIDEO_DECODER |
|
||||
BO_USE_HW_VIDEO_ENCODER);
|
||||
BO_USE_LINEAR | BO_USE_HW_VIDEO_DECODER | BO_USE_HW_VIDEO_ENCODER);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
|
@ -113,7 +112,7 @@ static int rockchip_bo_create_with_modifiers(struct bo *bo, uint32_t width, uint
|
|||
{
|
||||
int ret;
|
||||
size_t plane;
|
||||
struct drm_rockchip_gem_create gem_create;
|
||||
struct drm_rockchip_gem_create gem_create = { 0 };
|
||||
|
||||
if (format == DRM_FORMAT_NV12) {
|
||||
uint32_t w_mbs = DIV_ROUND_UP(width, 16);
|
||||
|
|
@ -156,9 +155,7 @@ static int rockchip_bo_create_with_modifiers(struct bo *bo, uint32_t width, uint
|
|||
drv_bo_from_format(bo, stride, height, format);
|
||||
}
|
||||
|
||||
memset(&gem_create, 0, sizeof(gem_create));
|
||||
gem_create.size = bo->meta.total_size;
|
||||
|
||||
ret = drmIoctl(bo->drv->fd, DRM_IOCTL_ROCKCHIP_GEM_CREATE, &gem_create);
|
||||
|
||||
if (ret) {
|
||||
|
|
@ -184,17 +181,15 @@ static int rockchip_bo_create(struct bo *bo, uint32_t width, uint32_t height, ui
|
|||
static void *rockchip_bo_map(struct bo *bo, struct vma *vma, size_t plane, uint32_t map_flags)
|
||||
{
|
||||
int ret;
|
||||
struct drm_rockchip_gem_map_off gem_map;
|
||||
struct rockchip_private_map_data *priv;
|
||||
struct drm_rockchip_gem_map_off gem_map = { 0 };
|
||||
|
||||
/* We can only map buffers created with SW access flags, which should
|
||||
* have no modifiers (ie, not AFBC). */
|
||||
if (bo->meta.format_modifiers[0] == DRM_FORMAT_MOD_CHROMEOS_ROCKCHIP_AFBC)
|
||||
return MAP_FAILED;
|
||||
|
||||
memset(&gem_map, 0, sizeof(gem_map));
|
||||
gem_map.handle = bo->handles[0].u32;
|
||||
|
||||
ret = drmIoctl(bo->drv->fd, DRM_IOCTL_ROCKCHIP_GEM_MAP_OFFSET, &gem_map);
|
||||
if (ret) {
|
||||
drv_log("DRM_IOCTL_ROCKCHIP_GEM_MAP_OFFSET failed\n");
|
||||
|
|
|
|||
39
synaptics.c
39
synaptics.c
|
|
@ -1,39 +0,0 @@
|
|||
/*
|
||||
* Copyright 2020 The Chromium OS Authors. All rights reserved.
|
||||
* Use of this source code is governed by a BSD-style license that can be
|
||||
* found in the LICENSE file.
|
||||
*/
|
||||
#ifdef DRV_SYNAPTICS
|
||||
|
||||
#include "drv_priv.h"
|
||||
#include "helpers.h"
|
||||
#include "util.h"
|
||||
|
||||
static const uint32_t render_target_formats[] = { DRM_FORMAT_ARGB8888, DRM_FORMAT_ABGR8888,
|
||||
DRM_FORMAT_XRGB8888 };
|
||||
|
||||
static const uint32_t texture_source_formats[] = { DRM_FORMAT_R8, DRM_FORMAT_NV12,
|
||||
DRM_FORMAT_YVU420, DRM_FORMAT_YVU420_ANDROID };
|
||||
|
||||
static int synaptics_init(struct driver *drv)
|
||||
{
|
||||
drv_add_combinations(drv, render_target_formats, ARRAY_SIZE(render_target_formats),
|
||||
&LINEAR_METADATA, BO_USE_RENDER_MASK | BO_USE_SCANOUT);
|
||||
|
||||
drv_add_combinations(drv, texture_source_formats, ARRAY_SIZE(texture_source_formats),
|
||||
&LINEAR_METADATA, BO_USE_TEXTURE_MASK | BO_USE_HW_VIDEO_ENCODER);
|
||||
|
||||
return drv_modify_linear_combinations(drv);
|
||||
}
|
||||
|
||||
const struct backend backend_synaptics = {
|
||||
.name = "synaptics",
|
||||
.init = synaptics_init,
|
||||
.bo_create = drv_dumb_bo_create,
|
||||
.bo_destroy = drv_dumb_bo_destroy,
|
||||
.bo_import = drv_prime_bo_import,
|
||||
.bo_map = drv_dumb_bo_map,
|
||||
.bo_unmap = drv_bo_munmap,
|
||||
};
|
||||
|
||||
#endif
|
||||
14
tegra.c
14
tegra.c
|
|
@ -213,7 +213,7 @@ static int tegra_bo_create(struct bo *bo, uint32_t width, uint32_t height, uint3
|
|||
{
|
||||
uint32_t size, stride, block_height_log2 = 0;
|
||||
enum nv_mem_kind kind = NV_MEM_KIND_PITCH;
|
||||
struct drm_tegra_gem_create gem_create;
|
||||
struct drm_tegra_gem_create gem_create = { 0 };
|
||||
int ret;
|
||||
|
||||
if (use_flags &
|
||||
|
|
@ -223,7 +223,6 @@ static int tegra_bo_create(struct bo *bo, uint32_t width, uint32_t height, uint3
|
|||
compute_layout_blocklinear(width, height, format, &kind, &block_height_log2,
|
||||
&stride, &size);
|
||||
|
||||
memset(&gem_create, 0, sizeof(gem_create));
|
||||
gem_create.size = size;
|
||||
gem_create.flags = 0;
|
||||
|
||||
|
|
@ -239,9 +238,8 @@ static int tegra_bo_create(struct bo *bo, uint32_t width, uint32_t height, uint3
|
|||
bo->meta.strides[0] = stride;
|
||||
|
||||
if (kind != NV_MEM_KIND_PITCH) {
|
||||
struct drm_tegra_gem_set_tiling gem_tile;
|
||||
struct drm_tegra_gem_set_tiling gem_tile = { 0 };
|
||||
|
||||
memset(&gem_tile, 0, sizeof(gem_tile));
|
||||
gem_tile.handle = bo->handles[0].u32;
|
||||
gem_tile.mode = DRM_TEGRA_GEM_TILING_MODE_BLOCK;
|
||||
gem_tile.value = block_height_log2;
|
||||
|
|
@ -264,16 +262,14 @@ static int tegra_bo_create(struct bo *bo, uint32_t width, uint32_t height, uint3
|
|||
static int tegra_bo_import(struct bo *bo, struct drv_import_fd_data *data)
|
||||
{
|
||||
int ret;
|
||||
struct drm_tegra_gem_get_tiling gem_get_tiling;
|
||||
struct drm_tegra_gem_get_tiling gem_get_tiling = { 0 };
|
||||
|
||||
ret = drv_prime_bo_import(bo, data);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
/* TODO(gsingh): export modifiers and get rid of backdoor tiling. */
|
||||
memset(&gem_get_tiling, 0, sizeof(gem_get_tiling));
|
||||
gem_get_tiling.handle = bo->handles[0].u32;
|
||||
|
||||
ret = drmIoctl(bo->drv->fd, DRM_IOCTL_TEGRA_GEM_GET_TILING, &gem_get_tiling);
|
||||
if (ret) {
|
||||
drv_gem_bo_destroy(bo);
|
||||
|
|
@ -299,12 +295,10 @@ static int tegra_bo_import(struct bo *bo, struct drv_import_fd_data *data)
|
|||
static void *tegra_bo_map(struct bo *bo, struct vma *vma, size_t plane, uint32_t map_flags)
|
||||
{
|
||||
int ret;
|
||||
struct drm_tegra_gem_mmap gem_map;
|
||||
struct drm_tegra_gem_mmap gem_map = { 0 };
|
||||
struct tegra_private_map_data *priv;
|
||||
|
||||
memset(&gem_map, 0, sizeof(gem_map));
|
||||
gem_map.handle = bo->handles[0].u32;
|
||||
|
||||
ret = drmCommandWriteRead(bo->drv->fd, DRM_TEGRA_GEM_MMAP, &gem_map, sizeof(gem_map));
|
||||
if (ret < 0) {
|
||||
drv_log("DRM_TEGRA_GEM_MMAP failed\n");
|
||||
|
|
|
|||
29
udl.c
29
udl.c
|
|
@ -1,29 +0,0 @@
|
|||
/*
|
||||
* Copyright 2014 The Chromium OS Authors. All rights reserved.
|
||||
* Use of this source code is governed by a BSD-style license that can be
|
||||
* found in the LICENSE file.
|
||||
*/
|
||||
|
||||
#include "drv_priv.h"
|
||||
#include "helpers.h"
|
||||
#include "util.h"
|
||||
|
||||
static const uint32_t render_target_formats[] = { DRM_FORMAT_ARGB8888, DRM_FORMAT_XRGB8888 };
|
||||
|
||||
static int udl_init(struct driver *drv)
|
||||
{
|
||||
drv_add_combinations(drv, render_target_formats, ARRAY_SIZE(render_target_formats),
|
||||
&LINEAR_METADATA, BO_USE_RENDER_MASK);
|
||||
|
||||
return drv_modify_linear_combinations(drv);
|
||||
}
|
||||
|
||||
const struct backend backend_udl = {
|
||||
.name = "udl",
|
||||
.init = udl_init,
|
||||
.bo_create = drv_dumb_bo_create,
|
||||
.bo_destroy = drv_dumb_bo_destroy,
|
||||
.bo_import = drv_prime_bo_import,
|
||||
.bo_map = drv_dumb_bo_map,
|
||||
.bo_unmap = drv_bo_munmap,
|
||||
};
|
||||
19
vc4.c
19
vc4.c
|
|
@ -20,11 +20,23 @@
|
|||
static const uint32_t render_target_formats[] = { DRM_FORMAT_ARGB8888, DRM_FORMAT_RGB565,
|
||||
DRM_FORMAT_XRGB8888 };
|
||||
|
||||
static const uint32_t texture_only_formats[] = { DRM_FORMAT_NV12, DRM_FORMAT_YVU420 };
|
||||
|
||||
static int vc4_init(struct driver *drv)
|
||||
{
|
||||
drv_add_combinations(drv, render_target_formats, ARRAY_SIZE(render_target_formats),
|
||||
&LINEAR_METADATA, BO_USE_RENDER_MASK);
|
||||
|
||||
drv_add_combinations(drv, texture_only_formats, ARRAY_SIZE(texture_only_formats),
|
||||
&LINEAR_METADATA, BO_USE_TEXTURE_MASK);
|
||||
/*
|
||||
* Chrome uses DMA-buf mmap to write to YV12 buffers, which are then accessed by the
|
||||
* Video Encoder Accelerator (VEA). It could also support NV12 potentially in the future.
|
||||
*/
|
||||
drv_modify_combination(drv, DRM_FORMAT_YVU420, &LINEAR_METADATA, BO_USE_HW_VIDEO_ENCODER);
|
||||
drv_modify_combination(drv, DRM_FORMAT_NV12, &LINEAR_METADATA,
|
||||
BO_USE_HW_VIDEO_DECODER | BO_USE_SCANOUT | BO_USE_HW_VIDEO_ENCODER);
|
||||
|
||||
return drv_modify_linear_combinations(drv);
|
||||
}
|
||||
|
||||
|
|
@ -34,7 +46,7 @@ static int vc4_bo_create_for_modifier(struct bo *bo, uint32_t width, uint32_t he
|
|||
int ret;
|
||||
size_t plane;
|
||||
uint32_t stride;
|
||||
struct drm_vc4_create_bo bo_create;
|
||||
struct drm_vc4_create_bo bo_create = { 0 };
|
||||
|
||||
switch (modifier) {
|
||||
case DRM_FORMAT_MOD_LINEAR:
|
||||
|
|
@ -54,7 +66,6 @@ static int vc4_bo_create_for_modifier(struct bo *bo, uint32_t width, uint32_t he
|
|||
stride = ALIGN(stride, 64);
|
||||
drv_bo_from_format(bo, stride, height, format);
|
||||
|
||||
memset(&bo_create, 0, sizeof(bo_create));
|
||||
bo_create.size = bo->meta.total_size;
|
||||
|
||||
ret = drmIoctl(bo->drv->fd, DRM_IOCTL_VC4_CREATE_BO, &bo_create);
|
||||
|
|
@ -97,11 +108,9 @@ static int vc4_bo_create_with_modifiers(struct bo *bo, uint32_t width, uint32_t
|
|||
static void *vc4_bo_map(struct bo *bo, struct vma *vma, size_t plane, uint32_t map_flags)
|
||||
{
|
||||
int ret;
|
||||
struct drm_vc4_mmap_bo bo_map;
|
||||
struct drm_vc4_mmap_bo bo_map = { 0 };
|
||||
|
||||
memset(&bo_map, 0, sizeof(bo_map));
|
||||
bo_map.handle = bo->handles[0].u32;
|
||||
|
||||
ret = drmCommandWriteRead(bo->drv->fd, DRM_VC4_MMAP_BO, &bo_map, sizeof(bo_map));
|
||||
if (ret) {
|
||||
drv_log("DRM_VC4_MMAP_BO failed\n");
|
||||
|
|
|
|||
63
vgem.c
63
vgem.c
|
|
@ -1,63 +0,0 @@
|
|||
/*
|
||||
* Copyright 2016 The Chromium OS Authors. All rights reserved.
|
||||
* Use of this source code is governed by a BSD-style license that can be
|
||||
* found in the LICENSE file.
|
||||
*/
|
||||
|
||||
#include "drv_priv.h"
|
||||
#include "helpers.h"
|
||||
#include "util.h"
|
||||
|
||||
#define MESA_LLVMPIPE_TILE_ORDER 6
|
||||
#define MESA_LLVMPIPE_TILE_SIZE (1 << MESA_LLVMPIPE_TILE_ORDER)
|
||||
|
||||
static const uint32_t render_target_formats[] = { DRM_FORMAT_ABGR8888, DRM_FORMAT_ARGB8888,
|
||||
DRM_FORMAT_RGB565, DRM_FORMAT_XBGR8888,
|
||||
DRM_FORMAT_XRGB8888 };
|
||||
|
||||
static const uint32_t texture_source_formats[] = { DRM_FORMAT_R8, DRM_FORMAT_YVU420,
|
||||
DRM_FORMAT_YVU420_ANDROID };
|
||||
|
||||
static int vgem_init(struct driver *drv)
|
||||
{
|
||||
drv_add_combinations(drv, render_target_formats, ARRAY_SIZE(render_target_formats),
|
||||
&LINEAR_METADATA, BO_USE_RENDER_MASK);
|
||||
|
||||
drv_add_combinations(drv, texture_source_formats, ARRAY_SIZE(texture_source_formats),
|
||||
&LINEAR_METADATA, BO_USE_TEXTURE_MASK);
|
||||
|
||||
return drv_modify_linear_combinations(drv);
|
||||
}
|
||||
|
||||
static int vgem_bo_create(struct bo *bo, uint32_t width, uint32_t height, uint32_t format,
|
||||
uint64_t flags)
|
||||
{
|
||||
width = ALIGN(width, MESA_LLVMPIPE_TILE_SIZE);
|
||||
height = ALIGN(height, MESA_LLVMPIPE_TILE_SIZE);
|
||||
|
||||
return drv_dumb_bo_create(bo, width, height, format, flags);
|
||||
}
|
||||
|
||||
static uint32_t vgem_resolve_format(struct driver *drv, uint32_t format, uint64_t flags)
|
||||
{
|
||||
switch (format) {
|
||||
case DRM_FORMAT_FLEX_IMPLEMENTATION_DEFINED:
|
||||
/*HACK: See b/28671744 */
|
||||
return DRM_FORMAT_XBGR8888;
|
||||
case DRM_FORMAT_FLEX_YCbCr_420_888:
|
||||
return DRM_FORMAT_YVU420;
|
||||
default:
|
||||
return format;
|
||||
}
|
||||
}
|
||||
|
||||
const struct backend backend_vgem = {
|
||||
.name = "vgem",
|
||||
.init = vgem_init,
|
||||
.bo_create = vgem_bo_create,
|
||||
.bo_destroy = drv_dumb_bo_destroy,
|
||||
.bo_import = drv_prime_bo_import,
|
||||
.bo_map = drv_dumb_bo_map,
|
||||
.bo_unmap = drv_bo_munmap,
|
||||
.resolve_format = vgem_resolve_format,
|
||||
};
|
||||
56
virtio_gpu.c
56
virtio_gpu.c
|
|
@ -467,7 +467,7 @@ static int virtio_virgl_bo_create(struct bo *bo, uint32_t width, uint32_t height
|
|||
int ret;
|
||||
size_t i;
|
||||
uint32_t stride;
|
||||
struct drm_virtgpu_resource_create res_create;
|
||||
struct drm_virtgpu_resource_create res_create = { 0 };
|
||||
struct bo_metadata emulated_metadata;
|
||||
|
||||
if (virtio_gpu_supports_combination_natively(bo->drv, format, use_flags)) {
|
||||
|
|
@ -497,7 +497,6 @@ static int virtio_virgl_bo_create(struct bo *bo, uint32_t width, uint32_t height
|
|||
* virglrenderer. When virglrenderer makes a resource, it will convert the target
|
||||
* enum to the equivalent one in GL and then bind the resource to that target.
|
||||
*/
|
||||
memset(&res_create, 0, sizeof(res_create));
|
||||
|
||||
res_create.target = PIPE_TEXTURE_2D;
|
||||
res_create.format = translate_format(format);
|
||||
|
|
@ -527,11 +526,9 @@ static int virtio_virgl_bo_create(struct bo *bo, uint32_t width, uint32_t height
|
|||
static void *virtio_virgl_bo_map(struct bo *bo, struct vma *vma, size_t plane, uint32_t map_flags)
|
||||
{
|
||||
int ret;
|
||||
struct drm_virtgpu_map gem_map;
|
||||
struct drm_virtgpu_map gem_map = { 0 };
|
||||
|
||||
memset(&gem_map, 0, sizeof(gem_map));
|
||||
gem_map.handle = bo->handles[0].u32;
|
||||
|
||||
ret = drmIoctl(bo->drv->fd, DRM_IOCTL_VIRTGPU_MAP, &gem_map);
|
||||
if (ret) {
|
||||
drv_log("DRM_IOCTL_VIRTGPU_MAP failed with %s\n", strerror(errno));
|
||||
|
|
@ -546,10 +543,9 @@ static void *virtio_virgl_bo_map(struct bo *bo, struct vma *vma, size_t plane, u
|
|||
static int virtio_gpu_get_caps(struct driver *drv, union virgl_caps *caps, int *caps_is_v2)
|
||||
{
|
||||
int ret;
|
||||
struct drm_virtgpu_get_caps cap_args;
|
||||
struct drm_virtgpu_get_caps cap_args = { 0 };
|
||||
|
||||
*caps_is_v2 = 0;
|
||||
memset(&cap_args, 0, sizeof(cap_args));
|
||||
cap_args.addr = (unsigned long long)caps;
|
||||
if (features[feat_capset_fix].enabled) {
|
||||
*caps_is_v2 = 1;
|
||||
|
|
@ -687,10 +683,11 @@ static int virtio_gpu_bo_create_blob(struct driver *drv, struct bo *bo)
|
|||
uint32_t cmd[VIRGL_PIPE_RES_CREATE_SIZE + 1] = { 0 };
|
||||
struct drm_virtgpu_resource_create_blob drm_rc_blob = { 0 };
|
||||
|
||||
uint32_t blob_flags = VIRTGPU_BLOB_FLAG_USE_MAPPABLE | VIRTGPU_BLOB_FLAG_USE_SHAREABLE;
|
||||
if (bo->meta.use_flags & BO_USE_NON_GPU_HW) {
|
||||
uint32_t blob_flags = VIRTGPU_BLOB_FLAG_USE_SHAREABLE;
|
||||
if (bo->meta.use_flags & BO_USE_SW_MASK)
|
||||
blob_flags |= VIRTGPU_BLOB_FLAG_USE_MAPPABLE;
|
||||
if (bo->meta.use_flags & BO_USE_NON_GPU_HW)
|
||||
blob_flags |= VIRTGPU_BLOB_FLAG_USE_CROSS_DEVICE;
|
||||
}
|
||||
|
||||
stride = drv_stride_from_format(bo->meta.format, bo->meta.width, 0);
|
||||
drv_bo_from_format(bo, stride, bo->meta.height, bo->meta.format);
|
||||
|
|
@ -736,19 +733,23 @@ static bool should_use_blob(struct driver *drv, uint32_t format, uint64_t use_fl
|
|||
if (!priv->host_gbm_enabled)
|
||||
return false;
|
||||
|
||||
// Focus on non-GPU apps for now
|
||||
if (use_flags & (BO_USE_RENDERING | BO_USE_TEXTURE))
|
||||
// Use regular resources if only the GPU needs efficient access
|
||||
if (!(use_flags &
|
||||
(BO_USE_SW_READ_OFTEN | BO_USE_SW_WRITE_OFTEN | BO_USE_LINEAR | BO_USE_NON_GPU_HW)))
|
||||
return false;
|
||||
|
||||
// Simple, strictly defined formats for now
|
||||
if (format != DRM_FORMAT_YVU420_ANDROID && format != DRM_FORMAT_R8)
|
||||
return false;
|
||||
|
||||
if (use_flags &
|
||||
(BO_USE_SW_READ_OFTEN | BO_USE_SW_WRITE_OFTEN | BO_USE_LINEAR | BO_USE_NON_GPU_HW))
|
||||
switch (format) {
|
||||
case DRM_FORMAT_YVU420_ANDROID:
|
||||
case DRM_FORMAT_R8:
|
||||
// Formats with strictly defined strides are supported
|
||||
return true;
|
||||
|
||||
return false;
|
||||
case DRM_FORMAT_NV12:
|
||||
// Knowing buffer metadata at buffer creation isn't yet supported, so buffers
|
||||
// can't be properly mapped into the guest.
|
||||
return (use_flags & BO_USE_SW_MASK) == 0;
|
||||
default:
|
||||
return false;
|
||||
}
|
||||
}
|
||||
|
||||
static int virtio_gpu_bo_create(struct bo *bo, uint32_t width, uint32_t height, uint32_t format,
|
||||
|
|
@ -784,8 +785,8 @@ static int virtio_gpu_bo_invalidate(struct bo *bo, struct mapping *mapping)
|
|||
{
|
||||
int ret;
|
||||
size_t i;
|
||||
struct drm_virtgpu_3d_transfer_from_host xfer;
|
||||
struct drm_virtgpu_3d_wait waitcmd;
|
||||
struct drm_virtgpu_3d_transfer_from_host xfer = { 0 };
|
||||
struct drm_virtgpu_3d_wait waitcmd = { 0 };
|
||||
struct virtio_transfers_params xfer_params;
|
||||
struct virtio_gpu_priv *priv = (struct virtio_gpu_priv *)bo->drv->priv;
|
||||
|
||||
|
|
@ -801,7 +802,6 @@ static int virtio_gpu_bo_invalidate(struct bo *bo, struct mapping *mapping)
|
|||
(bo->meta.tiling & VIRTGPU_BLOB_FLAG_USE_MAPPABLE))
|
||||
return 0;
|
||||
|
||||
memset(&xfer, 0, sizeof(xfer));
|
||||
xfer.bo_handle = mapping->vma->handle;
|
||||
|
||||
if (mapping->rect.x || mapping->rect.y) {
|
||||
|
|
@ -858,7 +858,6 @@ static int virtio_gpu_bo_invalidate(struct bo *bo, struct mapping *mapping)
|
|||
// The transfer needs to complete before invalidate returns so that any host changes
|
||||
// are visible and to ensure the host doesn't overwrite subsequent guest changes.
|
||||
// TODO(b/136733358): Support returning fences from transfers
|
||||
memset(&waitcmd, 0, sizeof(waitcmd));
|
||||
waitcmd.handle = mapping->vma->handle;
|
||||
ret = drmIoctl(bo->drv->fd, DRM_IOCTL_VIRTGPU_WAIT, &waitcmd);
|
||||
if (ret) {
|
||||
|
|
@ -873,8 +872,8 @@ static int virtio_gpu_bo_flush(struct bo *bo, struct mapping *mapping)
|
|||
{
|
||||
int ret;
|
||||
size_t i;
|
||||
struct drm_virtgpu_3d_transfer_to_host xfer;
|
||||
struct drm_virtgpu_3d_wait waitcmd;
|
||||
struct drm_virtgpu_3d_transfer_to_host xfer = { 0 };
|
||||
struct drm_virtgpu_3d_wait waitcmd = { 0 };
|
||||
struct virtio_transfers_params xfer_params;
|
||||
struct virtio_gpu_priv *priv = (struct virtio_gpu_priv *)bo->drv->priv;
|
||||
|
||||
|
|
@ -888,7 +887,6 @@ static int virtio_gpu_bo_flush(struct bo *bo, struct mapping *mapping)
|
|||
(bo->meta.tiling & VIRTGPU_BLOB_FLAG_USE_MAPPABLE))
|
||||
return 0;
|
||||
|
||||
memset(&xfer, 0, sizeof(xfer));
|
||||
xfer.bo_handle = mapping->vma->handle;
|
||||
|
||||
if (mapping->rect.x || mapping->rect.y) {
|
||||
|
|
@ -941,7 +939,6 @@ static int virtio_gpu_bo_flush(struct bo *bo, struct mapping *mapping)
|
|||
// buffer, we need to wait for the transfer to complete for consistency.
|
||||
// TODO(b/136733358): Support returning fences from transfers
|
||||
if (bo->meta.use_flags & BO_USE_NON_GPU_HW) {
|
||||
memset(&waitcmd, 0, sizeof(waitcmd));
|
||||
waitcmd.handle = mapping->vma->handle;
|
||||
|
||||
ret = drmIoctl(bo->drv->fd, DRM_IOCTL_VIRTGPU_WAIT, &waitcmd);
|
||||
|
|
@ -981,12 +978,11 @@ static int virtio_gpu_resource_info(struct bo *bo, uint32_t strides[DRV_MAX_PLAN
|
|||
uint32_t offsets[DRV_MAX_PLANES])
|
||||
{
|
||||
int ret;
|
||||
struct drm_virtgpu_resource_info res_info;
|
||||
struct drm_virtgpu_resource_info res_info = { 0 };
|
||||
|
||||
if (!features[feat_3d].enabled)
|
||||
return 0;
|
||||
|
||||
memset(&res_info, 0, sizeof(res_info));
|
||||
res_info.bo_handle = bo->handles[0].u32;
|
||||
ret = drmIoctl(bo->drv->fd, DRM_IOCTL_VIRTGPU_RESOURCE_INFO, &res_info);
|
||||
if (ret) {
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue