lineage-rockchip/android_external_minigbm
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minigbm: factor out metadata from struct bo

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Generated using coccinelle:

@@
struct bo *B;
@@

- B->width
+ B->width

BUG=chromium:924405
TEST=compile

Change-Id: I4da1731a650d198ce7f2bda3031a47b2f9c3041c
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/minigbm/+/1815566
Reviewed-by: Stéphane Marchesin <marcheu@chromium.org>
Tested-by: Gurchetan Singh <gurchetansingh@chromium.org>
Legacy-Commit-Queue: Commit Bot <commit-bot@chromium.org>
This commit is contained in:
Gurchetan Singh 2019-09-19 09:55:18 -07:00
parent 6116b3180d
commit 298b757913
13 changed files with 194 additions and 188 deletions
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8
amdgpu.c
View file

@ -183,7 +183,7 @@ static int amdgpu_create_bo(struct bo *bo, uint32_t width, uint32_t height, uint
drv_bo_from_format(bo, stride, height, format);
memset(&gem_create, 0, sizeof(gem_create));
gem_create.in.bo_size = bo->total_size;
gem_create.in.bo_size = bo->meta.total_size;
gem_create.in.alignment = 256;
gem_create.in.domain_flags = 0;
@ -200,7 +200,7 @@ static int amdgpu_create_bo(struct bo *bo, uint32_t width, uint32_t height, uint
if (ret < 0)
return ret;
for (plane = 0; plane < bo->num_planes; plane++)
for (plane = 0; plane < bo->meta.num_planes; plane++)
bo->handles[plane].u32 = gem_create.out.handle;
return 0;
@ -244,9 +244,9 @@ static void *amdgpu_map_bo(struct bo *bo, struct vma *vma, size_t plane, uint32_
return MAP_FAILED;
}
vma->length = bo->total_size;
vma->length = bo->meta.total_size;
return mmap(0, bo->total_size, drv_get_prot(map_flags), MAP_SHARED, bo->drv->fd,
return mmap(0, bo->meta.total_size, drv_get_prot(map_flags), MAP_SHARED, bo->drv->fd,
gem_map.out.addr_ptr);
}

21
dri.c
View file

@ -193,7 +193,7 @@ int dri_bo_create(struct bo *bo, uint32_t width, uint32_t height, uint32_t forma
int ret, dri_format, stride, offset;
struct dri_driver *dri = bo->drv->priv;
assert(bo->num_planes == 1);
assert(bo->meta.num_planes == 1);
dri_format = drm_format_to_dri_format(format);
/* Gallium drivers require shared to get the handle and stride. */
@ -226,10 +226,10 @@ int dri_bo_create(struct bo *bo, uint32_t width, uint32_t height, uint32_t forma
goto close_handle;
}
bo->strides[0] = stride;
bo->sizes[0] = stride * height;
bo->offsets[0] = offset;
bo->total_size = offset + bo->sizes[0];
bo->meta.strides[0] = stride;
bo->meta.sizes[0] = stride * height;
bo->meta.offsets[0] = offset;
bo->meta.total_size = offset + bo->meta.sizes[0];
return 0;
close_handle:
@ -244,11 +244,12 @@ int dri_bo_import(struct bo *bo, struct drv_import_fd_data *data)
int ret;
struct dri_driver *dri = bo->drv->priv;
assert(bo->num_planes == 1);
assert(bo->meta.num_planes == 1);
// clang-format off
bo->priv = dri->image_extension->createImageFromFds(dri->device, data->width, data->height,
data->format, data->fds, bo->num_planes,
data->format, data->fds,
bo->meta.num_planes,
(int *)data->strides,
(int *)data->offsets, NULL);
// clang-format on
@ -289,9 +290,9 @@ void *dri_bo_map(struct bo *bo, struct vma *vma, size_t plane, uint32_t map_flag
struct dri_driver *dri = bo->drv->priv;
/* GBM flags and DRI flags are the same. */
vma->addr =
dri->image_extension->mapImage(dri->context, bo->priv, 0, 0, bo->width, bo->height,
map_flags, (int *)&vma->map_strides[plane], &vma->priv);
vma->addr = dri->image_extension->mapImage(dri->context, bo->priv, 0, 0, bo->meta.width,
bo->meta.height, map_flags,
(int *)&vma->map_strides[plane], &vma->priv);
if (!vma->addr)
return MAP_FAILED;

80
drv.c
View file

@ -233,13 +233,13 @@ struct bo *drv_bo_new(struct driver *drv, uint32_t width, uint32_t height, uint3
return NULL;
bo->drv = drv;
bo->width = width;
bo->height = height;
bo->format = format;
bo->use_flags = use_flags;
bo->num_planes = drv_num_planes_from_format(format);
bo->meta.width = width;
bo->meta.height = height;
bo->meta.format = format;
bo->meta.use_flags = use_flags;
bo->meta.num_planes = drv_num_planes_from_format(format);
if (!bo->num_planes) {
if (!bo->meta.num_planes) {
free(bo);
return NULL;
}
@ -268,9 +268,9 @@ struct bo *drv_bo_create(struct driver *drv, uint32_t width, uint32_t height, ui
pthread_mutex_lock(&drv->driver_lock);
for (plane = 0; plane < bo->num_planes; plane++) {
for (plane = 0; plane < bo->meta.num_planes; plane++) {
if (plane > 0)
assert(bo->offsets[plane] >= bo->offsets[plane - 1]);
assert(bo->meta.offsets[plane] >= bo->meta.offsets[plane - 1]);
drv_increment_reference_count(drv, bo, plane);
}
@ -306,9 +306,9 @@ struct bo *drv_bo_create_with_modifiers(struct driver *drv, uint32_t width, uint
pthread_mutex_lock(&drv->driver_lock);
for (plane = 0; plane < bo->num_planes; plane++) {
for (plane = 0; plane < bo->meta.num_planes; plane++) {
if (plane > 0)
assert(bo->offsets[plane] >= bo->offsets[plane - 1]);
assert(bo->meta.offsets[plane] >= bo->meta.offsets[plane - 1]);
drv_increment_reference_count(drv, bo, plane);
}
@ -326,10 +326,10 @@ void drv_bo_destroy(struct bo *bo)
pthread_mutex_lock(&drv->driver_lock);
for (plane = 0; plane < bo->num_planes; plane++)
for (plane = 0; plane < bo->meta.num_planes; plane++)
drv_decrement_reference_count(drv, bo, plane);
for (plane = 0; plane < bo->num_planes; plane++)
for (plane = 0; plane < bo->meta.num_planes; plane++)
total += drv_get_reference_count(drv, bo, plane);
pthread_mutex_unlock(&drv->driver_lock);
@ -360,16 +360,16 @@ struct bo *drv_bo_import(struct driver *drv, struct drv_import_fd_data *data)
return NULL;
}
for (plane = 0; plane < bo->num_planes; plane++) {
for (plane = 0; plane < bo->meta.num_planes; plane++) {
pthread_mutex_lock(&bo->drv->driver_lock);
drv_increment_reference_count(bo->drv, bo, plane);
pthread_mutex_unlock(&bo->drv->driver_lock);
}
for (plane = 0; plane < bo->num_planes; plane++) {
bo->strides[plane] = data->strides[plane];
bo->offsets[plane] = data->offsets[plane];
bo->format_modifiers[plane] = data->format_modifiers[plane];
for (plane = 0; plane < bo->meta.num_planes; plane++) {
bo->meta.strides[plane] = data->strides[plane];
bo->meta.offsets[plane] = data->offsets[plane];
bo->meta.format_modifiers[plane] = data->format_modifiers[plane];
seek_end = lseek(data->fds[plane], 0, SEEK_END);
if (seek_end == (off_t)(-1)) {
@ -378,17 +378,17 @@ struct bo *drv_bo_import(struct driver *drv, struct drv_import_fd_data *data)
}
lseek(data->fds[plane], 0, SEEK_SET);
if (plane == bo->num_planes - 1 || data->offsets[plane + 1] == 0)
bo->sizes[plane] = seek_end - data->offsets[plane];
if (plane == bo->meta.num_planes - 1 || data->offsets[plane + 1] == 0)
bo->meta.sizes[plane] = seek_end - data->offsets[plane];
else
bo->sizes[plane] = data->offsets[plane + 1] - data->offsets[plane];
bo->meta.sizes[plane] = data->offsets[plane + 1] - data->offsets[plane];
if ((int64_t)bo->offsets[plane] + bo->sizes[plane] > seek_end) {
if ((int64_t)bo->meta.offsets[plane] + bo->meta.sizes[plane] > seek_end) {
drv_log("buffer size is too large.\n");
goto destroy_bo;
}
bo->total_size += bo->sizes[plane];
bo->meta.total_size += bo->meta.sizes[plane];
}
return bo;
@ -411,7 +411,7 @@ void *drv_bo_map(struct bo *bo, const struct rectangle *rect, uint32_t map_flags
assert(rect->y + rect->height <= drv_bo_get_height(bo));
assert(BO_MAP_READ_WRITE & map_flags);
/* No CPU access for protected buffers. */
assert(!(bo->use_flags & BO_USE_PROTECTED));
assert(!(bo->meta.use_flags & BO_USE_PROTECTED));
memset(&mapping, 0, sizeof(mapping));
mapping.rect = *rect;
@ -446,7 +446,7 @@ void *drv_bo_map(struct bo *bo, const struct rectangle *rect, uint32_t map_flags
}
mapping.vma = calloc(1, sizeof(*mapping.vma));
memcpy(mapping.vma->map_strides, bo->strides, sizeof(mapping.vma->map_strides));
memcpy(mapping.vma->map_strides, bo->meta.strides, sizeof(mapping.vma->map_strides));
addr = bo->drv->backend->bo_map(bo, mapping.vma, plane, map_flags);
if (addr == MAP_FAILED) {
*map_data = NULL;
@ -520,7 +520,7 @@ int drv_bo_flush_or_unmap(struct bo *bo, struct mapping *mapping)
assert(mapping->vma);
assert(mapping->refcount > 0);
assert(mapping->vma->refcount > 0);
assert(!(bo->use_flags & BO_USE_PROTECTED));
assert(!(bo->meta.use_flags & BO_USE_PROTECTED));
if (bo->drv->backend->bo_flush)
ret = bo->drv->backend->bo_flush(bo, mapping);
@ -532,22 +532,22 @@ int drv_bo_flush_or_unmap(struct bo *bo, struct mapping *mapping)
uint32_t drv_bo_get_width(struct bo *bo)
{
return bo->width;
return bo->meta.width;
}
uint32_t drv_bo_get_height(struct bo *bo)
{
return bo->height;
return bo->meta.height;
}
uint32_t drv_bo_get_stride_or_tiling(struct bo *bo)
{
return bo->tiling ? bo->tiling : drv_bo_get_plane_stride(bo, 0);
return bo->meta.tiling ? bo->meta.tiling : drv_bo_get_plane_stride(bo, 0);
}
size_t drv_bo_get_num_planes(struct bo *bo)
{
return bo->num_planes;
return bo->meta.num_planes;
}
union bo_handle drv_bo_get_plane_handle(struct bo *bo, size_t plane)
@ -563,7 +563,7 @@ int drv_bo_get_plane_fd(struct bo *bo, size_t plane)
{
int ret, fd;
assert(plane < bo->num_planes);
assert(plane < bo->meta.num_planes);
ret = drmPrimeHandleToFD(bo->drv->fd, bo->handles[plane].u32, DRM_CLOEXEC | DRM_RDWR, &fd);
@ -576,31 +576,31 @@ int drv_bo_get_plane_fd(struct bo *bo, size_t plane)
uint32_t drv_bo_get_plane_offset(struct bo *bo, size_t plane)
{
assert(plane < bo->num_planes);
return bo->offsets[plane];
assert(plane < bo->meta.num_planes);
return bo->meta.offsets[plane];
}
uint32_t drv_bo_get_plane_size(struct bo *bo, size_t plane)
{
assert(plane < bo->num_planes);
return bo->sizes[plane];
assert(plane < bo->meta.num_planes);
return bo->meta.sizes[plane];
}
uint32_t drv_bo_get_plane_stride(struct bo *bo, size_t plane)
{
assert(plane < bo->num_planes);
return bo->strides[plane];
assert(plane < bo->meta.num_planes);
return bo->meta.strides[plane];
}
uint64_t drv_bo_get_plane_format_modifier(struct bo *bo, size_t plane)
{
assert(plane < bo->num_planes);
return bo->format_modifiers[plane];
assert(plane < bo->meta.num_planes);
return bo->meta.format_modifiers[plane];
}
uint32_t drv_bo_get_format(struct bo *bo)
{
return bo->format;
return bo->meta.format;
}
uint32_t drv_resolve_format(struct driver *drv, uint32_t format, uint64_t use_flags)
@ -616,7 +616,7 @@ uint32_t drv_num_buffers_per_bo(struct bo *bo)
uint32_t count = 0;
size_t plane, p;
for (plane = 0; plane < bo->num_planes; plane++) {
for (plane = 0; plane < bo->meta.num_planes; plane++) {
for (p = 0; p < plane; p++)
if (bo->handles[p].u32 == bo->handles[plane].u32)
break;

10
drv_priv.h
View file

@ -14,20 +14,24 @@
#include "drv.h"
struct bo {
struct driver *drv;
struct bo_metadata {
uint32_t width;
uint32_t height;
uint32_t format;
uint32_t tiling;
size_t num_planes;
union bo_handle handles[DRV_MAX_PLANES];
uint32_t offsets[DRV_MAX_PLANES];
uint32_t sizes[DRV_MAX_PLANES];
uint32_t strides[DRV_MAX_PLANES];
uint64_t format_modifiers[DRV_MAX_PLANES];
uint64_t use_flags;
size_t total_size;
};
struct bo {
struct driver *drv;
struct bo_metadata meta;
union bo_handle handles[DRV_MAX_PLANES];
void *priv;
};

20
exynos.c
View file

@ -45,16 +45,16 @@ static int exynos_bo_create(struct bo *bo, uint32_t width, uint32_t height, uint
width = ALIGN(width, 16);
height = ALIGN(height, 32);
chroma_height = ALIGN(height / 2, 32);
bo->strides[0] = bo->strides[1] = width;
bo->meta.strides[0] = bo->meta.strides[1] = width;
/* MFC v8+ requires 64 byte padding in the end of luma and chroma buffers. */
bo->sizes[0] = bo->strides[0] * height + 64;
bo->sizes[1] = bo->strides[1] * chroma_height + 64;
bo->offsets[0] = bo->offsets[1] = 0;
bo->total_size = bo->sizes[0] + bo->sizes[1];
bo->meta.sizes[0] = bo->meta.strides[0] * height + 64;
bo->meta.sizes[1] = bo->meta.strides[1] * chroma_height + 64;
bo->meta.offsets[0] = bo->meta.offsets[1] = 0;
bo->meta.total_size = bo->meta.sizes[0] + bo->meta.sizes[1];
} else if (format == DRM_FORMAT_XRGB8888 || format == DRM_FORMAT_ARGB8888) {
bo->strides[0] = drv_stride_from_format(format, width, 0);
bo->total_size = bo->sizes[0] = height * bo->strides[0];
bo->offsets[0] = 0;
bo->meta.strides[0] = drv_stride_from_format(format, width, 0);
bo->meta.total_size = bo->meta.sizes[0] = height * bo->meta.strides[0];
bo->meta.offsets[0] = 0;
} else {
drv_log("unsupported format %X\n", format);
assert(0);
@ -62,8 +62,8 @@ static int exynos_bo_create(struct bo *bo, uint32_t width, uint32_t height, uint
}
int ret;
for (plane = 0; plane < bo->num_planes; plane++) {
size_t size = bo->sizes[plane];
for (plane = 0; plane < bo->meta.num_planes; plane++) {
size_t size = bo->meta.sizes[plane];
struct drm_exynos_gem_create gem_create;
memset(&gem_create, 0, sizeof(gem_create));

31
helpers.c
View file

@ -255,18 +255,19 @@ int drv_bo_from_format(struct bo *bo, uint32_t stride, uint32_t aligned_height,
* is 32 bytes aligned.
*/
if (format == DRM_FORMAT_YVU420_ANDROID) {
assert(aligned_height == bo->height);
assert(aligned_height == bo->meta.height);
assert(stride == ALIGN(stride, 32));
}
for (p = 0; p < num_planes; p++) {
bo->strides[p] = subsample_stride(stride, format, p);
bo->sizes[p] = drv_size_from_format(format, bo->strides[p], aligned_height, p);
bo->offsets[p] = offset;
offset += bo->sizes[p];
bo->meta.strides[p] = subsample_stride(stride, format, p);
bo->meta.sizes[p] =
drv_size_from_format(format, bo->meta.strides[p], aligned_height, p);
bo->meta.offsets[p] = offset;
offset += bo->meta.sizes[p];
}
bo->total_size = offset;
bo->meta.total_size = offset;
return 0;
}
@ -289,7 +290,7 @@ int drv_dumb_bo_create(struct bo *bo, uint32_t width, uint32_t height, uint32_t
*
* HAL_PIXEL_FORMAT_YV12 requires that the buffer's height not
* be aligned. */
aligned_height = 3 * DIV_ROUND_UP(bo->height, 2);
aligned_height = 3 * DIV_ROUND_UP(bo->meta.height, 2);
break;
case DRM_FORMAT_YVU420:
case DRM_FORMAT_NV12:
@ -314,10 +315,10 @@ int drv_dumb_bo_create(struct bo *bo, uint32_t width, uint32_t height, uint32_t
drv_bo_from_format(bo, create_dumb.pitch, height, format);
for (plane = 0; plane < bo->num_planes; plane++)
for (plane = 0; plane < bo->meta.num_planes; plane++)
bo->handles[plane].u32 = create_dumb.handle;
bo->total_size = create_dumb.size;
bo->meta.total_size = create_dumb.size;
return 0;
}
@ -344,7 +345,7 @@ int drv_gem_bo_destroy(struct bo *bo)
int ret, error = 0;
size_t plane, i;
for (plane = 0; plane < bo->num_planes; plane++) {
for (plane = 0; plane < bo->meta.num_planes; plane++) {
for (i = 0; i < plane; i++)
if (bo->handles[i].u32 == bo->handles[plane].u32)
break;
@ -372,7 +373,7 @@ int drv_prime_bo_import(struct bo *bo, struct drv_import_fd_data *data)
size_t plane;
struct drm_prime_handle prime_handle;
for (plane = 0; plane < bo->num_planes; plane++) {
for (plane = 0; plane < bo->meta.num_planes; plane++) {
memset(&prime_handle, 0, sizeof(prime_handle));
prime_handle.fd = data->fds[plane];
@ -387,7 +388,7 @@ int drv_prime_bo_import(struct bo *bo, struct drv_import_fd_data *data)
* plane that failed, so GEM close will be called on
* planes before that plane.
*/
bo->num_planes = plane;
bo->meta.num_planes = plane;
drv_gem_bo_destroy(bo);
return -errno;
}
@ -413,9 +414,9 @@ void *drv_dumb_bo_map(struct bo *bo, struct vma *vma, size_t plane, uint32_t map
return MAP_FAILED;
}
for (i = 0; i < bo->num_planes; i++)
for (i = 0; i < bo->meta.num_planes; i++)
if (bo->handles[i].u32 == bo->handles[plane].u32)
vma->length += bo->sizes[i];
vma->length += bo->meta.sizes[i];
return mmap(0, vma->length, drv_get_prot(map_flags), MAP_SHARED, bo->drv->fd,
map_dumb.offset);
@ -439,7 +440,7 @@ int drv_mapping_destroy(struct bo *bo)
*/
idx = 0;
for (plane = 0; plane < bo->num_planes; plane++) {
for (plane = 0; plane < bo->meta.num_planes; plane++) {
while (idx < drv_array_size(bo->drv->mappings)) {
mapping = (struct mapping *)drv_array_at_idx(bo->drv->mappings, idx);
if (mapping->vma->handle != bo->handles[plane].u32) {

58
i915.c
View file

@ -24,10 +24,10 @@
#define I915_CACHELINE_MASK (I915_CACHELINE_SIZE - 1)
static const uint32_t render_target_formats[] = { DRM_FORMAT_ABGR16161616F, DRM_FORMAT_ABGR2101010,
DRM_FORMAT_ABGR8888, DRM_FORMAT_ARGB1555,
DRM_FORMAT_ABGR8888, DRM_FORMAT_ARGB1555,
DRM_FORMAT_ARGB2101010, DRM_FORMAT_ARGB8888,
DRM_FORMAT_RGB565, DRM_FORMAT_XBGR2101010,
DRM_FORMAT_XBGR8888, DRM_FORMAT_XRGB1555,
DRM_FORMAT_RGB565, DRM_FORMAT_XBGR2101010,
DRM_FORMAT_XBGR8888, DRM_FORMAT_XRGB1555,
DRM_FORMAT_XRGB2101010, DRM_FORMAT_XRGB8888 };
static const uint32_t tileable_texture_source_formats[] = { DRM_FORMAT_GR88, DRM_FORMAT_R8,
@ -256,7 +256,7 @@ static int i915_align_dimensions(struct bo *bo, uint32_t tiling, uint32_t *strid
break;
}
*aligned_height = ALIGN(bo->height, vertical_alignment);
*aligned_height = ALIGN(bo->meta.height, vertical_alignment);
if (i915->gen > 3) {
*stride = ALIGN(*stride, horizontal_alignment);
} else {
@ -334,20 +334,20 @@ static int i915_bo_from_format(struct bo *bo, uint32_t width, uint32_t height, u
uint32_t stride = drv_stride_from_format(format, width, plane);
uint32_t plane_height = drv_height_from_format(format, height, plane);
if (bo->tiling != I915_TILING_NONE)
if (bo->meta.tiling != I915_TILING_NONE)
assert(IS_ALIGNED(offset, pagesize));
ret = i915_align_dimensions(bo, bo->tiling, &stride, &plane_height);
ret = i915_align_dimensions(bo, bo->meta.tiling, &stride, &plane_height);
if (ret)
return ret;
bo->strides[plane] = stride;
bo->sizes[plane] = stride * plane_height;
bo->offsets[plane] = offset;
offset += bo->sizes[plane];
bo->meta.strides[plane] = stride;
bo->meta.sizes[plane] = stride * plane_height;
bo->meta.offsets[plane] = offset;
offset += bo->meta.sizes[plane];
}
bo->total_size = ALIGN(offset, pagesize);
bo->meta.total_size = ALIGN(offset, pagesize);
return 0;
}
@ -362,17 +362,17 @@ static int i915_bo_create_for_modifier(struct bo *bo, uint32_t width, uint32_t h
switch (modifier) {
case DRM_FORMAT_MOD_LINEAR:
bo->tiling = I915_TILING_NONE;
bo->meta.tiling = I915_TILING_NONE;
break;
case I915_FORMAT_MOD_X_TILED:
bo->tiling = I915_TILING_X;
bo->meta.tiling = I915_TILING_X;
break;
case I915_FORMAT_MOD_Y_TILED:
bo->tiling = I915_TILING_Y;
bo->meta.tiling = I915_TILING_Y;
break;
}
bo->format_modifiers[0] = modifier;
bo->meta.format_modifiers[0] = modifier;
if (format == DRM_FORMAT_YVU420_ANDROID) {
/*
@ -390,7 +390,7 @@ static int i915_bo_create_for_modifier(struct bo *bo, uint32_t width, uint32_t h
}
memset(&gem_create, 0, sizeof(gem_create));
gem_create.size = bo->total_size;
gem_create.size = bo->meta.total_size;
ret = drmIoctl(bo->drv->fd, DRM_IOCTL_I915_GEM_CREATE, &gem_create);
if (ret) {
@ -398,13 +398,13 @@ static int i915_bo_create_for_modifier(struct bo *bo, uint32_t width, uint32_t h
return -errno;
}
for (plane = 0; plane < bo->num_planes; plane++)
for (plane = 0; plane < bo->meta.num_planes; plane++)
bo->handles[plane].u32 = gem_create.handle;
memset(&gem_set_tiling, 0, sizeof(gem_set_tiling));
gem_set_tiling.handle = bo->handles[0].u32;
gem_set_tiling.tiling_mode = bo->tiling;
gem_set_tiling.stride = bo->strides[0];
gem_set_tiling.tiling_mode = bo->meta.tiling;
gem_set_tiling.stride = bo->meta.strides[0];
ret = drmIoctl(bo->drv->fd, DRM_IOCTL_I915_GEM_SET_TILING, &gem_set_tiling);
if (ret) {
@ -473,7 +473,7 @@ static int i915_bo_import(struct bo *bo, struct drv_import_fd_data *data)
return ret;
}
bo->tiling = gem_get_tiling.tiling_mode;
bo->meta.tiling = gem_get_tiling.tiling_mode;
return 0;
}
@ -482,7 +482,7 @@ static void *i915_bo_map(struct bo *bo, struct vma *vma, size_t plane, uint32_t
int ret;
void *addr;
if (bo->tiling == I915_TILING_NONE) {
if (bo->meta.tiling == I915_TILING_NONE) {
struct drm_i915_gem_mmap gem_map;
memset(&gem_map, 0, sizeof(gem_map));
@ -494,14 +494,14 @@ static void *i915_bo_map(struct bo *bo, struct vma *vma, size_t plane, uint32_t
* For now, care must be taken not to use WC mappings for
* Renderscript and camera use cases, as they're
* performance-sensitive. */
if ((bo->use_flags & BO_USE_SCANOUT) &&
!(bo->use_flags &
if ((bo->meta.use_flags & BO_USE_SCANOUT) &&
!(bo->meta.use_flags &
(BO_USE_RENDERSCRIPT | BO_USE_CAMERA_READ | BO_USE_CAMERA_WRITE)))
gem_map.flags = I915_MMAP_WC;
gem_map.handle = bo->handles[0].u32;
gem_map.offset = 0;
gem_map.size = bo->total_size;
gem_map.size = bo->meta.total_size;
ret = drmIoctl(bo->drv->fd, DRM_IOCTL_I915_GEM_MMAP, &gem_map);
if (ret) {
@ -522,8 +522,8 @@ static void *i915_bo_map(struct bo *bo, struct vma *vma, size_t plane, uint32_t
return MAP_FAILED;
}
addr = mmap(0, bo->total_size, drv_get_prot(map_flags), MAP_SHARED, bo->drv->fd,
gem_map.offset);
addr = mmap(0, bo->meta.total_size, drv_get_prot(map_flags), MAP_SHARED,
bo->drv->fd, gem_map.offset);
}
if (addr == MAP_FAILED) {
@ -531,7 +531,7 @@ static void *i915_bo_map(struct bo *bo, struct vma *vma, size_t plane, uint32_t
return addr;
}
vma->length = bo->total_size;
vma->length = bo->meta.total_size;
return addr;
}
@ -542,7 +542,7 @@ static int i915_bo_invalidate(struct bo *bo, struct mapping *mapping)
memset(&set_domain, 0, sizeof(set_domain));
set_domain.handle = bo->handles[0].u32;
if (bo->tiling == I915_TILING_NONE) {
if (bo->meta.tiling == I915_TILING_NONE) {
set_domain.read_domains = I915_GEM_DOMAIN_CPU;
if (mapping->vma->map_flags & BO_MAP_WRITE)
set_domain.write_domain = I915_GEM_DOMAIN_CPU;
@ -564,7 +564,7 @@ static int i915_bo_invalidate(struct bo *bo, struct mapping *mapping)
static int i915_bo_flush(struct bo *bo, struct mapping *mapping)
{
struct i915_device *i915 = bo->drv->priv;
if (!i915->has_llc && bo->tiling == I915_TILING_NONE)
if (!i915->has_llc && bo->meta.tiling == I915_TILING_NONE)
i915_clflush(mapping->vma->addr, mapping->vma->length);
return 0;

16
mediatek.c
View file

@ -114,7 +114,7 @@ static int mediatek_bo_create_with_modifiers(struct bo *bo, uint32_t width, uint
drv_bo_from_format(bo, stride, height, format);
memset(&gem_create, 0, sizeof(gem_create));
gem_create.size = bo->total_size;
gem_create.size = bo->meta.total_size;
ret = drmIoctl(bo->drv->fd, DRM_IOCTL_MTK_GEM_CREATE, &gem_create);
if (ret) {
@ -122,7 +122,7 @@ static int mediatek_bo_create_with_modifiers(struct bo *bo, uint32_t width, uint
return -errno;
}
for (plane = 0; plane < bo->num_planes; plane++)
for (plane = 0; plane < bo->meta.num_planes; plane++)
bo->handles[plane].u32 = gem_create.handle;
return 0;
@ -157,17 +157,17 @@ static void *mediatek_bo_map(struct bo *bo, struct vma *vma, size_t plane, uint3
return MAP_FAILED;
}
void *addr = mmap(0, bo->total_size, drv_get_prot(map_flags), MAP_SHARED, bo->drv->fd,
void *addr = mmap(0, bo->meta.total_size, drv_get_prot(map_flags), MAP_SHARED, bo->drv->fd,
gem_map.offset);
vma->length = bo->total_size;
vma->length = bo->meta.total_size;
priv = calloc(1, sizeof(*priv));
priv->prime_fd = prime_fd;
vma->priv = priv;
if (bo->use_flags & BO_USE_RENDERSCRIPT) {
priv->cached_addr = calloc(1, bo->total_size);
if (bo->meta.use_flags & BO_USE_RENDERSCRIPT) {
priv->cached_addr = calloc(1, bo->meta.total_size);
priv->gem_addr = addr;
addr = priv->cached_addr;
}
@ -213,7 +213,7 @@ static int mediatek_bo_invalidate(struct bo *bo, struct mapping *mapping)
drv_log("poll prime_fd failed\n");
if (priv->cached_addr)
memcpy(priv->cached_addr, priv->gem_addr, bo->total_size);
memcpy(priv->cached_addr, priv->gem_addr, bo->meta.total_size);
}
return 0;
@ -223,7 +223,7 @@ static int mediatek_bo_flush(struct bo *bo, struct mapping *mapping)
{
struct mediatek_private_map_data *priv = mapping->vma->priv;
if (priv && priv->cached_addr && (mapping->vma->map_flags & BO_MAP_WRITE))
memcpy(priv->gem_addr, priv->cached_addr, bo->total_size);
memcpy(priv->gem_addr, priv->cached_addr, bo->meta.total_size);
return 0;
}

46
msm.c
View file

@ -69,13 +69,13 @@ static void msm_calculate_layout(struct bo *bo)
{
uint32_t width, height;
width = bo->width;
height = bo->height;
width = bo->meta.width;
height = bo->meta.height;
/* NV12 format requires extra padding with platform
* specific alignments for venus driver
*/
if (bo->format == DRM_FORMAT_NV12) {
if (bo->meta.format == DRM_FORMAT_NV12) {
uint32_t y_stride, uv_stride, y_scanline, uv_scanline, y_plane, uv_plane, size,
extra_padding;
@ -86,7 +86,7 @@ static void msm_calculate_layout(struct bo *bo)
y_plane = y_stride * y_scanline;
uv_plane = uv_stride * uv_scanline;
if (bo->tiling == MSM_UBWC_TILING) {
if (bo->meta.tiling == MSM_UBWC_TILING) {
y_plane += get_ubwc_meta_size(width, height, 32, 8);
uv_plane += get_ubwc_meta_size(width >> 1, height >> 1, 16, 8);
extra_padding = NV12_UBWC_PADDING(y_stride);
@ -94,34 +94,34 @@ static void msm_calculate_layout(struct bo *bo)
extra_padding = NV12_LINEAR_PADDING;
}
bo->strides[0] = y_stride;
bo->sizes[0] = y_plane;
bo->offsets[1] = y_plane;
bo->strides[1] = uv_stride;
bo->meta.strides[0] = y_stride;
bo->meta.sizes[0] = y_plane;
bo->meta.offsets[1] = y_plane;
bo->meta.strides[1] = uv_stride;
size = y_plane + uv_plane + extra_padding;
bo->total_size = ALIGN(size, BUFFER_SIZE_ALIGN);
bo->sizes[1] = bo->total_size - bo->sizes[0];
bo->meta.total_size = ALIGN(size, BUFFER_SIZE_ALIGN);
bo->meta.sizes[1] = bo->meta.total_size - bo->meta.sizes[0];
} else {
uint32_t stride, alignw, alignh;
alignw = ALIGN(width, DEFAULT_ALIGNMENT);
/* HAL_PIXEL_FORMAT_YV12 requires that the buffer's height not be aligned. */
if (bo->format == DRM_FORMAT_YVU420_ANDROID) {
if (bo->meta.format == DRM_FORMAT_YVU420_ANDROID) {
alignh = height;
} else {
alignh = ALIGN(height, DEFAULT_ALIGNMENT);
}
stride = drv_stride_from_format(bo->format, alignw, 0);
stride = drv_stride_from_format(bo->meta.format, alignw, 0);
/* Calculate size and assign stride, size, offset to each plane based on format */
drv_bo_from_format(bo, stride, alignh, bo->format);
drv_bo_from_format(bo, stride, alignh, bo->meta.format);
/* For all RGB UBWC formats */
if (bo->tiling == MSM_UBWC_TILING) {
bo->sizes[0] += get_ubwc_meta_size(width, height, 16, 4);
bo->total_size = bo->sizes[0];
assert(IS_ALIGNED(bo->total_size, BUFFER_SIZE_ALIGN));
if (bo->meta.tiling == MSM_UBWC_TILING) {
bo->meta.sizes[0] += get_ubwc_meta_size(width, height, 16, 4);
bo->meta.total_size = bo->meta.sizes[0];
assert(IS_ALIGNED(bo->meta.total_size, BUFFER_SIZE_ALIGN));
}
}
}
@ -201,13 +201,13 @@ static int msm_bo_create_for_modifier(struct bo *bo, uint32_t width, uint32_t he
int ret;
size_t i;
bo->tiling = (modifier == DRM_FORMAT_MOD_QCOM_COMPRESSED) ? MSM_UBWC_TILING : 0;
bo->meta.tiling = (modifier == DRM_FORMAT_MOD_QCOM_COMPRESSED) ? MSM_UBWC_TILING : 0;
msm_calculate_layout(bo);
memset(&req, 0, sizeof(req));
req.flags = MSM_BO_WC | MSM_BO_SCANOUT;
req.size = bo->total_size;
req.size = bo->meta.total_size;
ret = drmIoctl(bo->drv->fd, DRM_IOCTL_MSM_GEM_NEW, &req);
if (ret) {
@ -219,9 +219,9 @@ static int msm_bo_create_for_modifier(struct bo *bo, uint32_t width, uint32_t he
* Though we use only one plane, we need to set handle for
* all planes to pass kernel checks
*/
for (i = 0; i < bo->num_planes; i++) {
for (i = 0; i < bo->meta.num_planes; i++) {
bo->handles[i].u32 = req.handle;
bo->format_modifiers[i] = modifier;
bo->meta.format_modifiers[i] = modifier;
}
return 0;
@ -268,9 +268,9 @@ static void *msm_bo_map(struct bo *bo, struct vma *vma, size_t plane, uint32_t m
drv_log("DRM_IOCLT_MSM_GEM_INFO failed with %s\n", strerror(errno));
return MAP_FAILED;
}
vma->length = bo->total_size;
vma->length = bo->meta.total_size;
return mmap(0, bo->total_size, drv_get_prot(map_flags), MAP_SHARED, bo->drv->fd,
return mmap(0, bo->meta.total_size, drv_get_prot(map_flags), MAP_SHARED, bo->drv->fd,
req.offset);
}

30
rockchip.c
View file

@ -63,13 +63,13 @@ static int afbc_bo_from_format(struct bo *bo, uint32_t width, uint32_t height, u
const uint32_t body_plane_offset = ALIGN(header_plane_size, body_plane_alignment);
const uint32_t total_size = body_plane_offset + body_plane_size;
bo->strides[0] = width_in_blocks * block_width * pixel_size;
bo->sizes[0] = total_size;
bo->offsets[0] = 0;
bo->meta.strides[0] = width_in_blocks * block_width * pixel_size;
bo->meta.sizes[0] = total_size;
bo->meta.offsets[0] = 0;
bo->total_size = total_size;
bo->meta.total_size = total_size;
bo->format_modifiers[0] = DRM_FORMAT_MOD_CHROMEOS_ROCKCHIP_AFBC;
bo->meta.format_modifiers[0] = DRM_FORMAT_MOD_CHROMEOS_ROCKCHIP_AFBC;
return 0;
}
@ -180,7 +180,7 @@ static int rockchip_bo_create_with_modifiers(struct bo *bo, uint32_t width, uint
* drv_bo_from_format updates total_size. Add an extra data space for rockchip video
* driver to store motion vectors.
*/
bo->total_size += w_mbs * h_mbs * 128;
bo->meta.total_size += w_mbs * h_mbs * 128;
} else if (width <= 2560 &&
drv_has_modifier(modifiers, count, DRM_FORMAT_MOD_CHROMEOS_ROCKCHIP_AFBC)) {
/* If the caller has decided they can use AFBC, always
@ -210,7 +210,7 @@ static int rockchip_bo_create_with_modifiers(struct bo *bo, uint32_t width, uint
}
memset(&gem_create, 0, sizeof(gem_create));
gem_create.size = bo->total_size;
gem_create.size = bo->meta.total_size;
ret = drmIoctl(bo->drv->fd, DRM_IOCTL_ROCKCHIP_GEM_CREATE, &gem_create);
@ -220,7 +220,7 @@ static int rockchip_bo_create_with_modifiers(struct bo *bo, uint32_t width, uint
return -errno;
}
for (plane = 0; plane < bo->num_planes; plane++)
for (plane = 0; plane < bo->meta.num_planes; plane++)
bo->handles[plane].u32 = gem_create.handle;
return 0;
@ -242,7 +242,7 @@ static void *rockchip_bo_map(struct bo *bo, struct vma *vma, size_t plane, uint3
/* We can only map buffers created with SW access flags, which should
* have no modifiers (ie, not AFBC). */
if (bo->format_modifiers[0] == DRM_FORMAT_MOD_CHROMEOS_ROCKCHIP_AFBC)
if (bo->meta.format_modifiers[0] == DRM_FORMAT_MOD_CHROMEOS_ROCKCHIP_AFBC)
return MAP_FAILED;
memset(&gem_map, 0, sizeof(gem_map));
@ -254,14 +254,14 @@ static void *rockchip_bo_map(struct bo *bo, struct vma *vma, size_t plane, uint3
return MAP_FAILED;
}
void *addr = mmap(0, bo->total_size, drv_get_prot(map_flags), MAP_SHARED, bo->drv->fd,
void *addr = mmap(0, bo->meta.total_size, drv_get_prot(map_flags), MAP_SHARED, bo->drv->fd,
gem_map.offset);
vma->length = bo->total_size;
vma->length = bo->meta.total_size;
if (bo->use_flags & BO_USE_RENDERSCRIPT) {
if (bo->meta.use_flags & BO_USE_RENDERSCRIPT) {
priv = calloc(1, sizeof(*priv));
priv->cached_addr = calloc(1, bo->total_size);
priv->cached_addr = calloc(1, bo->meta.total_size);
priv->gem_addr = addr;
vma->priv = priv;
addr = priv->cached_addr;
@ -287,7 +287,7 @@ static int rockchip_bo_invalidate(struct bo *bo, struct mapping *mapping)
{
if (mapping->vma->priv) {
struct rockchip_private_map_data *priv = mapping->vma->priv;
memcpy(priv->cached_addr, priv->gem_addr, bo->total_size);
memcpy(priv->cached_addr, priv->gem_addr, bo->meta.total_size);
}
return 0;
@ -297,7 +297,7 @@ static int rockchip_bo_flush(struct bo *bo, struct mapping *mapping)
{
struct rockchip_private_map_data *priv = mapping->vma->priv;
if (priv && (mapping->vma->map_flags & BO_MAP_WRITE))
memcpy(priv->gem_addr, priv->cached_addr, bo->total_size);
memcpy(priv->gem_addr, priv->cached_addr, bo->meta.total_size);
return 0;
}

38
tegra.c
View file

@ -119,12 +119,12 @@ static void transfer_tile(struct bo *bo, uint8_t *tiled, uint8_t *untiled, enum
if (tiled >= tiled_last)
return;
if (x >= bo->width || y >= bo->height) {
if (x >= bo->meta.width || y >= bo->meta.height) {
tiled += bytes_per_pixel;
continue;
}
tmp = untiled + y * bo->strides[0] + x * bytes_per_pixel;
tmp = untiled + y * bo->meta.strides[0] + x * bytes_per_pixel;
if (type == TEGRA_READ_TILED_BUFFER)
memcpy(tmp, tiled, bytes_per_pixel);
@ -143,7 +143,7 @@ static void transfer_tiled_memory(struct bo *bo, uint8_t *tiled, uint8_t *untile
gob_top, gob_left;
uint32_t i, j, offset;
uint8_t *tmp, *tiled_last;
uint32_t bytes_per_pixel = drv_stride_from_format(bo->format, 1, 0);
uint32_t bytes_per_pixel = drv_stride_from_format(bo->meta.format, 1, 0);
/*
* The blocklinear format consists of 8*(2^n) x 64 byte sized tiles,
@ -152,16 +152,16 @@ static void transfer_tiled_memory(struct bo *bo, uint8_t *tiled, uint8_t *untile
gob_width = DIV_ROUND_UP(NV_BLOCKLINEAR_GOB_WIDTH, bytes_per_pixel);
gob_height = NV_BLOCKLINEAR_GOB_HEIGHT * (1 << NV_DEFAULT_BLOCK_HEIGHT_LOG2);
/* Calculate the height from maximum possible gob height */
while (gob_height > NV_BLOCKLINEAR_GOB_HEIGHT && gob_height >= 2 * bo->height)
while (gob_height > NV_BLOCKLINEAR_GOB_HEIGHT && gob_height >= 2 * bo->meta.height)
gob_height /= 2;
gob_size_bytes = gob_height * NV_BLOCKLINEAR_GOB_WIDTH;
gob_size_pixels = gob_height * gob_width;
gob_count_x = DIV_ROUND_UP(bo->strides[0], NV_BLOCKLINEAR_GOB_WIDTH);
gob_count_y = DIV_ROUND_UP(bo->height, gob_height);
gob_count_x = DIV_ROUND_UP(bo->meta.strides[0], NV_BLOCKLINEAR_GOB_WIDTH);
gob_count_y = DIV_ROUND_UP(bo->meta.height, gob_height);
tiled_last = tiled + bo->total_size;
tiled_last = tiled + bo->meta.total_size;
offset = 0;
for (j = 0; j < gob_count_y; j++) {
@ -234,9 +234,9 @@ static int tegra_bo_create(struct bo *bo, uint32_t width, uint32_t height, uint3
}
bo->handles[0].u32 = gem_create.handle;
bo->offsets[0] = 0;
bo->total_size = bo->sizes[0] = size;
bo->strides[0] = stride;
bo->meta.offsets[0] = 0;
bo->meta.total_size = bo->meta.sizes[0] = size;
bo->meta.strides[0] = stride;
if (kind != NV_MEM_KIND_PITCH) {
struct drm_tegra_gem_set_tiling gem_tile;
@ -254,8 +254,8 @@ static int tegra_bo_create(struct bo *bo, uint32_t width, uint32_t height, uint3
}
/* Encode blocklinear parameters for EGLImage creation. */
bo->tiling = (kind & 0xff) | ((block_height_log2 & 0xf) << 8);
bo->format_modifiers[0] = fourcc_mod_code(NV, bo->tiling);
bo->meta.tiling = (kind & 0xff) | ((block_height_log2 & 0xf) << 8);
bo->meta.format_modifiers[0] = fourcc_mod_code(NV, bo->meta.tiling);
}
return 0;
@ -283,16 +283,16 @@ static int tegra_bo_import(struct bo *bo, struct drv_import_fd_data *data)
/* NOTE(djmk): we only know about one tiled format, so if our drmIoctl call tells us we are
tiled, assume it is this format (NV_MEM_KIND_C32_2CRA) otherwise linear (KIND_PITCH). */
if (gem_get_tiling.mode == DRM_TEGRA_GEM_TILING_MODE_PITCH) {
bo->tiling = NV_MEM_KIND_PITCH;
bo->meta.tiling = NV_MEM_KIND_PITCH;
} else if (gem_get_tiling.mode == DRM_TEGRA_GEM_TILING_MODE_BLOCK) {
bo->tiling = NV_MEM_KIND_C32_2CRA;
bo->meta.tiling = NV_MEM_KIND_C32_2CRA;
} else {
drv_log("%s: unknown tile format %d\n", __func__, gem_get_tiling.mode);
drv_gem_bo_destroy(bo);
assert(0);
}
bo->format_modifiers[0] = fourcc_mod_code(NV, bo->tiling);
bo->meta.format_modifiers[0] = fourcc_mod_code(NV, bo->meta.tiling);
return 0;
}
@ -311,12 +311,12 @@ static void *tegra_bo_map(struct bo *bo, struct vma *vma, size_t plane, uint32_t
return MAP_FAILED;
}
void *addr = mmap(0, bo->total_size, drv_get_prot(map_flags), MAP_SHARED, bo->drv->fd,
void *addr = mmap(0, bo->meta.total_size, drv_get_prot(map_flags), MAP_SHARED, bo->drv->fd,
gem_map.offset);
vma->length = bo->total_size;
if ((bo->tiling & 0xFF) == NV_MEM_KIND_C32_2CRA && addr != MAP_FAILED) {
vma->length = bo->meta.total_size;
if ((bo->meta.tiling & 0xFF) == NV_MEM_KIND_C32_2CRA && addr != MAP_FAILED) {
priv = calloc(1, sizeof(*priv));
priv->untiled = calloc(1, bo->total_size);
priv->untiled = calloc(1, bo->meta.total_size);
priv->tiled = addr;
vma->priv = priv;
transfer_tiled_memory(bo, priv->tiled, priv->untiled, TEGRA_READ_TILED_BUFFER);

10
vc4.c
View file

@ -45,15 +45,15 @@ static int vc4_bo_create(struct bo *bo, uint32_t width, uint32_t height, uint32_
drv_bo_from_format(bo, stride, height, format);
memset(&bo_create, 0, sizeof(bo_create));
bo_create.size = bo->total_size;
bo_create.size = bo->meta.total_size;
ret = drmIoctl(bo->drv->fd, DRM_IOCTL_VC4_CREATE_BO, &bo_create);
if (ret) {
drv_log("DRM_IOCTL_VC4_GEM_CREATE failed (size=%zu)\n", bo->total_size);
drv_log("DRM_IOCTL_VC4_GEM_CREATE failed (size=%zu)\n", bo->meta.total_size);
return -errno;
}
for (plane = 0; plane < bo->num_planes; plane++)
for (plane = 0; plane < bo->meta.num_planes; plane++)
bo->handles[plane].u32 = bo_create.handle;
return 0;
@ -73,8 +73,8 @@ static void *vc4_bo_map(struct bo *bo, struct vma *vma, size_t plane, uint32_t m
return MAP_FAILED;
}
vma->length = bo->total_size;
return mmap(NULL, bo->total_size, drv_get_prot(map_flags), MAP_SHARED, bo->drv->fd,
vma->length = bo->meta.total_size;
return mmap(NULL, bo->meta.total_size, drv_get_prot(map_flags), MAP_SHARED, bo->drv->fd,
bo_map.offset);
}

14
virtio_gpu.c
View file

@ -69,7 +69,7 @@ static uint32_t translate_format(uint32_t drm_fourcc)
static int virtio_dumb_bo_create(struct bo *bo, uint32_t width, uint32_t height, uint32_t format,
uint64_t use_flags)
{
if (bo->format != DRM_FORMAT_R8) {
if (bo->meta.format != DRM_FORMAT_R8) {
width = ALIGN(width, MESA_LLVMPIPE_TILE_SIZE);
height = ALIGN(height, MESA_LLVMPIPE_TILE_SIZE);
}
@ -133,14 +133,14 @@ static int virtio_virgl_bo_create(struct bo *bo, uint32_t width, uint32_t height
res_create.last_level = 0;
res_create.nr_samples = 0;
res_create.size = ALIGN(bo->total_size, PAGE_SIZE); // PAGE_SIZE = 0x1000
res_create.size = ALIGN(bo->meta.total_size, PAGE_SIZE); // PAGE_SIZE = 0x1000
ret = drmIoctl(bo->drv->fd, DRM_IOCTL_VIRTGPU_RESOURCE_CREATE, &res_create);
if (ret) {
drv_log("DRM_IOCTL_VIRTGPU_RESOURCE_CREATE failed with %s\n", strerror(errno));
return ret;
}
for (uint32_t plane = 0; plane < bo->num_planes; plane++)
for (uint32_t plane = 0; plane < bo->meta.num_planes; plane++)
bo->handles[plane].u32 = res_create.bo_handle;
return 0;
@ -160,8 +160,8 @@ static void *virtio_virgl_bo_map(struct bo *bo, struct vma *vma, size_t plane, u
return MAP_FAILED;
}
vma->length = bo->total_size;
return mmap(0, bo->total_size, drv_get_prot(map_flags), MAP_SHARED, bo->drv->fd,
vma->length = bo->meta.total_size;
return mmap(0, bo->meta.total_size, drv_get_prot(map_flags), MAP_SHARED, bo->drv->fd,
gem_map.offset);
}
@ -266,7 +266,7 @@ static int virtio_gpu_bo_invalidate(struct bo *bo, struct mapping *mapping)
// Unfortunately, the kernel doesn't actually pass the guest layer_stride and
// guest stride to the host (compare virtio_gpu.h and virtgpu_drm.h). We can use
// the level to work around this.
xfer.level = bo->strides[0];
xfer.level = bo->meta.strides[0];
ret = drmIoctl(bo->drv->fd, DRM_IOCTL_VIRTGPU_TRANSFER_FROM_HOST, &xfer);
if (ret) {
@ -300,7 +300,7 @@ static int virtio_gpu_bo_flush(struct bo *bo, struct mapping *mapping)
// Unfortunately, the kernel doesn't actually pass the guest layer_stride and
// guest stride to the host (compare virtio_gpu.h and virtgpu_drm.h). We can use
// the level to work around this.
xfer.level = bo->strides[0];
xfer.level = bo->meta.strides[0];
ret = drmIoctl(bo->drv->fd, DRM_IOCTL_VIRTGPU_TRANSFER_TO_HOST, &xfer);
if (ret) {