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Snap for 13701173 from 7b8d54b37b to 25Q4-release

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Change-Id: I46bd23b020587939a0f5d91caedff7522a8fa5aa
This commit is contained in:
Android Build Coastguard Worker 2025-06-26 16:14:16 -07:00
commit 1aea2d6c4d
11 changed files with 65 additions and 67 deletions
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2
cros_gralloc/aidl/.clang-format
View file

@ -16,4 +16,4 @@ IndentWidth: 4
ContinuationIndentWidth: 8 ContinuationIndentWidth: 8
PointerAlignment: Left PointerAlignment: Left
TabWidth: 4 TabWidth: 4
UseTab: Never UseTab: Never

2
cros_gralloc/aidl/allocator.xml
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@ -7,4 +7,4 @@
<instance>default</instance> <instance>default</instance>
</interface> </interface>
</hal> </hal>
</manifest> </manifest>

2
cros_gralloc/gralloc0/tests/gralloctest.c
View file

@ -22,7 +22,7 @@
#include <sync/sync.h> #include <sync/sync.h>
#include <system/graphics.h> #include <system/graphics.h>
#define ALIGN(A, B) (((A) + (B) - 1) / (B) * (B)) #define ALIGN(A, B) (((A) + (B)-1) / (B) * (B))
#define ARRAY_SIZE(A) (sizeof(A) / sizeof(*(A))) #define ARRAY_SIZE(A) (sizeof(A) / sizeof(*(A)))
#define CHECK(cond) \ #define CHECK(cond) \

2
cros_gralloc/gralloc4/.clang-format
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@ -16,4 +16,4 @@ IndentWidth: 4
ContinuationIndentWidth: 8 ContinuationIndentWidth: 8
PointerAlignment: Left PointerAlignment: Left
TabWidth: 4 TabWidth: 4
UseTab: Never UseTab: Never

2
cros_gralloc/mapper_stablec/.clang-format
View file

@ -16,4 +16,4 @@ IndentWidth: 4
ContinuationIndentWidth: 8 ContinuationIndentWidth: 8
PointerAlignment: Left PointerAlignment: Left
TabWidth: 4 TabWidth: 4
UseTab: Never UseTab: Never

4
i915.c
View file

@ -559,7 +559,7 @@ static size_t i915_num_planes_from_modifier(struct driver *drv, uint32_t format,
32 - __builtin_clz(x)) \ 32 - __builtin_clz(x)) \
: 0) : 0)
#define roundup_power_of_two(x) ((x) != 0 ? 1ULL << gbm_fls((x) - 1) : 0) #define roundup_power_of_two(x) ((x) != 0 ? 1ULL << gbm_fls((x)-1) : 0)
static int i915_bo_compute_metadata(struct bo *bo, uint32_t width, uint32_t height, uint32_t format, static int i915_bo_compute_metadata(struct bo *bo, uint32_t width, uint32_t height, uint32_t format,
uint64_t use_flags, const uint64_t *modifiers, uint32_t count) uint64_t use_flags, const uint64_t *modifiers, uint32_t count)
@ -590,7 +590,7 @@ static int i915_bo_compute_metadata(struct bo *bo, uint32_t width, uint32_t heig
uint64_t cursor_width = 0; uint64_t cursor_width = 0;
uint64_t cursor_height = 0; uint64_t cursor_height = 0;
bool err = drmGetCap(bo->drv->fd, DRM_CAP_CURSOR_WIDTH, &cursor_width) || bool err = drmGetCap(bo->drv->fd, DRM_CAP_CURSOR_WIDTH, &cursor_width) ||
drmGetCap(bo->drv->fd, DRM_CAP_CURSOR_HEIGHT, &cursor_height); drmGetCap(bo->drv->fd, DRM_CAP_CURSOR_HEIGHT, &cursor_height);
if (!err && width <= cursor_width && height <= cursor_height) { if (!err && width <= cursor_width && height <= cursor_height) {
width = cursor_width; width = cursor_width;

39
intel_defines.h
View file

@ -7,25 +7,18 @@
#define ARRAY_SIZE(A) (sizeof(A) / sizeof(*(A))) #define ARRAY_SIZE(A) (sizeof(A) / sizeof(*(A)))
static const uint32_t scanout_render_formats[] = { static const uint32_t scanout_render_formats[] = {
DRM_FORMAT_ABGR2101010, DRM_FORMAT_ABGR2101010, DRM_FORMAT_ABGR8888, DRM_FORMAT_ARGB2101010,
DRM_FORMAT_ABGR8888, DRM_FORMAT_ARGB8888, DRM_FORMAT_RGB565, DRM_FORMAT_XBGR2101010,
DRM_FORMAT_ARGB2101010, DRM_FORMAT_XBGR8888, DRM_FORMAT_XRGB2101010, DRM_FORMAT_XRGB8888,
DRM_FORMAT_ARGB8888,
DRM_FORMAT_RGB565,
DRM_FORMAT_XBGR2101010,
DRM_FORMAT_XBGR8888,
DRM_FORMAT_XRGB2101010,
DRM_FORMAT_XRGB8888,
}; };
static const uint32_t render_formats[] = { DRM_FORMAT_ABGR16161616F, }; static const uint32_t render_formats[] = {
DRM_FORMAT_ABGR16161616F,
};
static const uint32_t texture_only_formats[] = { static const uint32_t texture_only_formats[] = {
DRM_FORMAT_R8, DRM_FORMAT_R8, DRM_FORMAT_NV12, DRM_FORMAT_P010,
DRM_FORMAT_NV12, DRM_FORMAT_YVU420, DRM_FORMAT_YVU420_ANDROID,
DRM_FORMAT_P010,
DRM_FORMAT_YVU420,
DRM_FORMAT_YVU420_ANDROID,
}; };
static const uint32_t image_storage_formats[] = { static const uint32_t image_storage_formats[] = {
@ -65,17 +58,23 @@ const uint16_t gen12_ids[] = {
}; };
const uint16_t adlp_ids[] = { const uint16_t adlp_ids[] = {
0x46A0, 0x46A1, 0x46A2, 0x46A3, 0x46A6, 0x46A8, 0x46AA, 0x462A, 0x4626, 0x4628, 0x46A0, 0x46A1, 0x46A2, 0x46A3, 0x46A6, 0x46A8, 0x46AA, 0x462A,
0x46B0, 0x46B1, 0x46B2, 0x46B3, 0x46C0, 0x46C1, 0x46C2, 0x46C3, 0x46D0, 0x46D1, 0x4626, 0x4628, 0x46B0, 0x46B1, 0x46B2, 0x46B3, 0x46C0, 0x46C1,
0x46D2, 0x46D3, 0x46D4, 0x46C2, 0x46C3, 0x46D0, 0x46D1, 0x46D2, 0x46D3, 0x46D4,
}; };
const uint16_t rplp_ids[] = { const uint16_t rplp_ids[] = {
0xA720, 0xA721, 0xA7A0, 0xA7A1, 0xA7A8, 0xA7A9, 0xA7AA, 0xA7AB, 0xA7AC, 0xA7AD, 0xA720, 0xA721, 0xA7A0, 0xA7A1, 0xA7A8, 0xA7A9, 0xA7AA, 0xA7AB, 0xA7AC, 0xA7AD,
}; };
const uint16_t mtl_ids[] = { 0x7D40, 0x7D60, 0x7D45, 0x7D55, 0x7DD5, }; const uint16_t mtl_ids[] = {
0x7D40, 0x7D60, 0x7D45, 0x7D55, 0x7DD5,
};
const uint16_t lnl_ids[] = { 0x6420, 0x64A0, 0x64B0, }; const uint16_t lnl_ids[] = {
0x6420,
0x64A0,
0x64B0,
};
const uint16_t ptl_ids[] = { 0xB080, 0xB081, 0xB082, 0xB083, 0xB08F, 0xB090, 0xB0A0, 0xB0B0 }; const uint16_t ptl_ids[] = { 0xB080, 0xB081, 0xB082, 0xB083, 0xB08F, 0xB090, 0xB0A0, 0xB0B0 };

13
presubmit.sh
View file

@ -2,9 +2,10 @@
# Copyright 2017 The Chromium OS Authors. All rights reserved. # Copyright 2017 The Chromium OS Authors. All rights reserved.
# Use of this source code is governed by a BSD-style license that can be # Use of this source code is governed by a BSD-style license that can be
# found in the LICENSE file. # found in the LICENSE file.
find \ cros format \
'(' -name '*.[ch]' -or -name '*.cc' ')' \ --exclude 'external/*' \
-not -name 'virtgpu_drm.h' -not -name 'i915_drm.h' \ --exclude 'gbm.h' \
-not -name 'gbm.h' -not -name 'virgl_hw.h' \ --include '*.[ch]' \
-not -name 'virgl_protocol.h' \ --include '*.cc' \
-exec clang-format -style=file -i {} + --include '*.cpp' \
.

6
util.h
View file

@ -10,11 +10,11 @@
#define MAX(A, B) ((A) > (B) ? (A) : (B)) #define MAX(A, B) ((A) > (B) ? (A) : (B))
#define ARRAY_SIZE(A) (sizeof(A) / sizeof(*(A))) #define ARRAY_SIZE(A) (sizeof(A) / sizeof(*(A)))
#define PUBLIC __attribute__((visibility("default"))) #define PUBLIC __attribute__((visibility("default")))
#define ALIGN(A, B) (((A) + (B) - 1) & ~((B) - 1)) #define ALIGN(A, B) (((A) + (B)-1) & ~((B)-1))
#define IS_ALIGNED(A, B) (ALIGN((A), (B)) == (A)) #define IS_ALIGNED(A, B) (ALIGN((A), (B)) == (A))
#define DIV_ROUND_UP(n, d) (((n) + (d) - 1) / (d)) #define DIV_ROUND_UP(n, d) (((n) + (d)-1) / (d))
#define STRINGIZE_NO_EXPANSION(x) #x #define STRINGIZE_NO_EXPANSION(x) #x
#define STRINGIZE(x) STRINGIZE_NO_EXPANSION(x) #define STRINGIZE(x) STRINGIZE_NO_EXPANSION(x)
#define BITFIELD_BIT(b) (1u<<(b)) #define BITFIELD_BIT(b) (1u << (b))
#endif #endif

7
virtgpu_virgl.c
View file

@ -53,10 +53,9 @@ static const uint32_t texture_source_formats[] = {
DRM_FORMAT_ABGR2101010, DRM_FORMAT_ABGR16161616F DRM_FORMAT_ABGR2101010, DRM_FORMAT_ABGR16161616F
}; };
static const uint32_t depth_stencil_formats[] = { static const uint32_t depth_stencil_formats[] = { DRM_FORMAT_DEPTH16, DRM_FORMAT_DEPTH24,
DRM_FORMAT_DEPTH16, DRM_FORMAT_DEPTH24, DRM_FORMAT_DEPTH24_STENCIL8, DRM_FORMAT_DEPTH24_STENCIL8, DRM_FORMAT_DEPTH32,
DRM_FORMAT_DEPTH32, DRM_FORMAT_DEPTH32_STENCIL8 DRM_FORMAT_DEPTH32_STENCIL8 };
};
extern struct virtgpu_param params[]; extern struct virtgpu_param params[];

53
xe.c
View file

@ -19,8 +19,8 @@
#include "drv_priv.h" #include "drv_priv.h"
#include "external/xe_drm.h" #include "external/xe_drm.h"
#include "util.h"
#include "intel_defines.h" #include "intel_defines.h"
#include "util.h"
struct modifier_support_t { struct modifier_support_t {
const uint64_t *order; const uint64_t *order;
@ -39,8 +39,8 @@ struct xe_device {
uint64_t gtt_size; uint64_t gtt_size;
/** /**
* Memory vm bind alignment and buffer size requirement * Memory vm bind alignment and buffer size requirement
*/ */
unsigned mem_alignment; unsigned mem_alignment;
struct modifier_support_t modifier; struct modifier_support_t modifier;
@ -135,7 +135,7 @@ static int xe_add_combinations(struct driver *drv)
const uint64_t texture_only = BO_USE_TEXTURE_MASK; const uint64_t texture_only = BO_USE_TEXTURE_MASK;
// HW protected buffers also need to be scanned out. // HW protected buffers also need to be scanned out.
const uint64_t hw_protected = const uint64_t hw_protected =
xe->has_hw_protection ? (BO_USE_PROTECTED | BO_USE_SCANOUT) : 0; xe->has_hw_protection ? (BO_USE_PROTECTED | BO_USE_SCANOUT) : 0;
const uint64_t linear_mask = BO_USE_RENDERSCRIPT | BO_USE_LINEAR | BO_USE_SW_READ_OFTEN | const uint64_t linear_mask = BO_USE_RENDERSCRIPT | BO_USE_LINEAR | BO_USE_SW_READ_OFTEN |
BO_USE_SW_WRITE_OFTEN | BO_USE_SW_READ_RARELY | BO_USE_SW_WRITE_OFTEN | BO_USE_SW_READ_RARELY |
@ -236,7 +236,7 @@ static int xe_add_combinations(struct driver *drv)
} }
static int xe_align_dimensions(struct bo *bo, uint32_t format, uint32_t tiling, uint32_t *stride, static int xe_align_dimensions(struct bo *bo, uint32_t format, uint32_t tiling, uint32_t *stride,
uint32_t *aligned_height) uint32_t *aligned_height)
{ {
uint32_t horizontal_alignment = 0; uint32_t horizontal_alignment = 0;
uint32_t vertical_alignment = 0; uint32_t vertical_alignment = 0;
@ -307,19 +307,18 @@ static bool xe_query_config(struct driver *drv, struct xe_device *xe)
struct drm_xe_device_query query = { struct drm_xe_device_query query = {
.query = DRM_XE_DEVICE_QUERY_CONFIG, .query = DRM_XE_DEVICE_QUERY_CONFIG,
}; };
if(drmIoctl(drv->fd, DRM_IOCTL_XE_DEVICE_QUERY, &query)) if (drmIoctl(drv->fd, DRM_IOCTL_XE_DEVICE_QUERY, &query))
return false; return false;
struct drm_xe_query_config *config = calloc(1, query.size); struct drm_xe_query_config *config = calloc(1, query.size);
if(!config) if (!config)
return false; return false;
query.data = (uintptr_t)config; query.data = (uintptr_t)config;
if(drmIoctl(drv->fd, DRM_IOCTL_XE_DEVICE_QUERY, &query)) if (drmIoctl(drv->fd, DRM_IOCTL_XE_DEVICE_QUERY, &query))
goto data_query_failed; goto data_query_failed;
if (config->info[DRM_XE_QUERY_CONFIG_FLAGS] & DRM_XE_QUERY_CONFIG_FLAG_HAS_VRAM)
if(config->info[DRM_XE_QUERY_CONFIG_FLAGS] & DRM_XE_QUERY_CONFIG_FLAG_HAS_VRAM)
xe->has_local_mem = true; xe->has_local_mem = true;
else else
xe->has_local_mem = false; xe->has_local_mem = false;
@ -339,7 +338,7 @@ data_query_failed:
static bool xe_device_probe(struct driver *drv, struct xe_device *xe) static bool xe_device_probe(struct driver *drv, struct xe_device *xe)
{ {
/* Retrieve the device info by querying KMD through IOCTL /* Retrieve the device info by querying KMD through IOCTL
*/ */
struct drm_xe_device_query query = { struct drm_xe_device_query query = {
.extensions = 0, .extensions = 0,
.query = DRM_XE_DEVICE_QUERY_CONFIG, .query = DRM_XE_DEVICE_QUERY_CONFIG,
@ -347,20 +346,21 @@ static bool xe_device_probe(struct driver *drv, struct xe_device *xe)
.data = 0, .data = 0,
}; };
if(drmIoctl(drv->fd, DRM_IOCTL_XE_DEVICE_QUERY, &query)) if (drmIoctl(drv->fd, DRM_IOCTL_XE_DEVICE_QUERY, &query))
return false; return false;
struct drm_xe_query_config *config = calloc(1, query.size); struct drm_xe_query_config *config = calloc(1, query.size);
if(!config) if (!config)
return false; return false;
query.data = (uintptr_t)config; query.data = (uintptr_t)config;
if(drmIoctl(drv->fd, DRM_IOCTL_XE_DEVICE_QUERY, &query)){ if (drmIoctl(drv->fd, DRM_IOCTL_XE_DEVICE_QUERY, &query)) {
free(config); free(config);
return false; return false;
} }
xe->device_id = ((config->info[DRM_XE_QUERY_CONFIG_REV_AND_DEVICE_ID] << 16)>>16) & 0xFFFF; xe->device_id =
((config->info[DRM_XE_QUERY_CONFIG_REV_AND_DEVICE_ID] << 16) >> 16) & 0xFFFF;
xe->revision = (config->info[DRM_XE_QUERY_CONFIG_REV_AND_DEVICE_ID] >> 16) & 0xFFFF; xe->revision = (config->info[DRM_XE_QUERY_CONFIG_REV_AND_DEVICE_ID] >> 16) & 0xFFFF;
free(config); free(config);
@ -375,7 +375,7 @@ static int xe_init(struct driver *drv)
if (!xe) if (!xe)
return -ENOMEM; return -ENOMEM;
if(!xe_device_probe(drv, xe)){ if (!xe_device_probe(drv, xe)) {
drv_loge("Failed to query device id using DRM_IOCTL_XE_DEVICE_QUERY"); drv_loge("Failed to query device id using DRM_IOCTL_XE_DEVICE_QUERY");
return -EINVAL; return -EINVAL;
} }
@ -391,14 +391,14 @@ static int xe_init(struct driver *drv)
if (xe->graphics_version >= 12) if (xe->graphics_version >= 12)
xe->has_hw_protection = 0; xe->has_hw_protection = 0;
else if (xe->graphics_version < 12) { else if (xe->graphics_version < 12) {
drv_loge("Xe driver is not supported on your platform: 0x%x\n",xe->device_id); drv_loge("Xe driver is not supported on your platform: 0x%x\n", xe->device_id);
return -errno; return -errno;
} }
drv->priv = xe; drv->priv = xe;
return xe_add_combinations(drv); return xe_add_combinations(drv);
return 0; return 0;
} }
/* /*
@ -406,8 +406,7 @@ return 0;
* to the largest coded unit (LCU) assuming that it will be used for video. This * to the largest coded unit (LCU) assuming that it will be used for video. This
* is based on gmmlib's GmmIsYUVFormatLCUAligned(). * is based on gmmlib's GmmIsYUVFormatLCUAligned().
*/ */
static bool xe_format_needs_LCU_alignment(uint32_t format, size_t plane, static bool xe_format_needs_LCU_alignment(uint32_t format, size_t plane, const struct xe_device *xe)
const struct xe_device *xe)
{ {
switch (format) { switch (format) {
case DRM_FORMAT_NV12: case DRM_FORMAT_NV12:
@ -473,7 +472,7 @@ static size_t xe_num_planes_from_modifier(struct driver *drv, uint32_t format, u
} }
static int xe_bo_compute_metadata(struct bo *bo, uint32_t width, uint32_t height, uint32_t format, static int xe_bo_compute_metadata(struct bo *bo, uint32_t width, uint32_t height, uint32_t format,
uint64_t use_flags, const uint64_t *modifiers, uint32_t count) uint64_t use_flags, const uint64_t *modifiers, uint32_t count)
{ {
int ret = 0; int ret = 0;
uint64_t modifier; uint64_t modifier;
@ -661,10 +660,10 @@ static int xe_bo_create_from_metadata(struct bo *bo)
} }
struct drm_xe_gem_create gem_create = { struct drm_xe_gem_create gem_create = {
.vm_id = 0, /* ensure exportable to PRIME fd */ .vm_id = 0, /* ensure exportable to PRIME fd */
.size = bo->meta.total_size, .size = bo->meta.total_size,
.flags = flags, .flags = flags,
.cpu_caching = cpu_caching, .cpu_caching = cpu_caching,
}; };
/* FIXME: let's assume iGPU with SYSMEM is only supported */ /* FIXME: let's assume iGPU with SYSMEM is only supported */
@ -711,8 +710,8 @@ static void *xe_bo_map(struct bo *bo, struct vma *vma, uint32_t map_flags)
/* Get the fake offset back */ /* Get the fake offset back */
ret = drmIoctl(bo->drv->fd, DRM_IOCTL_XE_GEM_MMAP_OFFSET, &gem_map); ret = drmIoctl(bo->drv->fd, DRM_IOCTL_XE_GEM_MMAP_OFFSET, &gem_map);
if (ret == 0) { if (ret == 0) {
addr = mmap(0, bo->meta.total_size, PROT_READ | PROT_WRITE, addr = mmap(0, bo->meta.total_size, PROT_READ | PROT_WRITE, MAP_SHARED, bo->drv->fd,
MAP_SHARED, bo->drv->fd, gem_map.offset); gem_map.offset);
} }
if (addr == MAP_FAILED) { if (addr == MAP_FAILED) {