SSSE3 is already quite old (introduced 2006 for Intel, 2011 for AMD), so that the overwhelming majority of our users (particularly those that actually update their FFmpeg) will be using the SSSE3 versions. This commit therefore removes the MMXEXT functions overridden by them (which don't abide by the ABI) to get closer to a removal of emms_c. Reviewed-by: Ronald S. Bultje <rsbultje@gmail.com> Signed-off-by: Andreas Rheinhardt <andreas.rheinhardt@outlook.com>
420 lines
16 KiB
C
420 lines
16 KiB
C
/*
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* VP9 SIMD optimizations
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*
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* Copyright (c) 2013 Ronald S. Bultje <rsbultje gmail com>
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*
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* This file is part of FFmpeg.
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*
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* FFmpeg is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2.1 of the License, or (at your option) any later version.
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*
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* FFmpeg is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with FFmpeg; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include "libavutil/attributes.h"
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#include "libavutil/cpu.h"
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#include "libavutil/x86/cpu.h"
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#include "libavcodec/vp9dsp.h"
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#include "libavcodec/x86/vp9dsp_init.h"
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decl_fpel_func(put, 4, , mmx);
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decl_fpel_func(put, 8, , mmx);
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decl_fpel_func(put, 16, , sse);
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decl_fpel_func(put, 32, , sse);
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decl_fpel_func(put, 64, , sse);
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decl_fpel_func(avg, 4, _8, mmxext);
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decl_fpel_func(avg, 8, _8, mmxext);
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decl_fpel_func(avg, 16, _8, sse2);
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decl_fpel_func(avg, 32, _8, sse2);
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decl_fpel_func(avg, 64, _8, sse2);
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decl_fpel_func(put, 32, , avx);
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decl_fpel_func(put, 64, , avx);
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decl_fpel_func(avg, 32, _8, avx2);
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decl_fpel_func(avg, 64, _8, avx2);
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decl_mc_funcs(8, sse2, int16_t, 8, 8);
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decl_mc_funcs(4, ssse3, int8_t, 32, 8);
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decl_mc_funcs(8, ssse3, int8_t, 32, 8);
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#if ARCH_X86_64
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decl_mc_funcs(16, ssse3, int8_t, 32, 8);
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decl_mc_funcs(32, avx2, int8_t, 32, 8);
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decl_subpel_asm( 4, 8, avx512icl);
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decl_subpel_asm( 8, 8, avx512icl);
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decl_subpel_asm(16, 8, avx512icl);
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decl_subpel_asm(32, 8, avx512icl);
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decl_subpel_asm(64, 8, avx512icl);
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#endif
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mc_rep_funcs(16, 8, 8, sse2, int16_t, 8, 8)
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#if ARCH_X86_32
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mc_rep_funcs(16, 8, 8, ssse3, int8_t, 32, 8)
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#endif
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mc_rep_funcs(32, 16, 16, sse2, int16_t, 8, 8)
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mc_rep_funcs(32, 16, 16, ssse3, int8_t, 32, 8)
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mc_rep_funcs(64, 32, 32, sse2, int16_t, 8, 8)
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mc_rep_funcs(64, 32, 32, ssse3, int8_t, 32, 8)
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#if ARCH_X86_64 && HAVE_AVX2_EXTERNAL
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mc_rep_funcs(64, 32, 32, avx2, int8_t, 32, 8)
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#endif
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extern const int8_t ff_filters_ssse3[3][15][4][32];
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extern const int16_t ff_filters_sse2[3][15][8][8];
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filters_8tap_2d_fn2(put, 16, 8, 1, sse2, sse2)
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filters_8tap_2d_fn2(avg, 16, 8, 1, sse2, sse2)
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filters_8tap_2d_fn3(put, 16, 8, 1, ssse3, ssse3)
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filters_8tap_2d_fn3(avg, 16, 8, 1, ssse3, ssse3)
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#if ARCH_X86_64 && HAVE_AVX2_EXTERNAL
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filters_8tap_2d_fn(put, 64, 32, 8, 1, avx2, ssse3)
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filters_8tap_2d_fn(put, 32, 32, 8, 1, avx2, ssse3)
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filters_8tap_2d_fn(avg, 64, 32, 8, 1, avx2, ssse3)
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filters_8tap_2d_fn(avg, 32, 32, 8, 1, avx2, ssse3)
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#endif
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filters_8tap_1d_fn3(put, 8, sse2, sse2)
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filters_8tap_1d_fn3(avg, 8, sse2, sse2)
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filters_8tap_1d_fn4(put, 8, ssse3, ssse3)
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filters_8tap_1d_fn4(avg, 8, ssse3, ssse3)
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#if ARCH_X86_64 && HAVE_AVX2_EXTERNAL
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filters_8tap_1d_fn2(put, 64, 8, avx2, ssse3)
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filters_8tap_1d_fn2(put, 32, 8, avx2, ssse3)
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filters_8tap_1d_fn2(avg, 64, 8, avx2, ssse3)
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filters_8tap_1d_fn2(avg, 32, 8, avx2, ssse3)
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#endif
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#define itxfm_func(typea, typeb, size, opt) \
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void ff_vp9_##typea##_##typeb##_##size##x##size##_add_##opt(uint8_t *dst, ptrdiff_t stride, \
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int16_t *block, int eob)
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#define itxfm_funcs(size, opt) \
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itxfm_func(idct, idct, size, opt); \
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itxfm_func(iadst, idct, size, opt); \
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itxfm_func(idct, iadst, size, opt); \
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itxfm_func(iadst, iadst, size, opt)
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itxfm_func(idct, iadst, 4, sse2);
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itxfm_func(iadst, idct, 4, sse2);
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itxfm_func(iadst, iadst, 4, sse2);
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itxfm_funcs(4, ssse3);
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itxfm_funcs(4, avx2);
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itxfm_funcs(8, sse2);
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itxfm_funcs(8, ssse3);
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itxfm_funcs(8, avx2);
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itxfm_funcs(16, sse2);
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itxfm_funcs(16, ssse3);
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itxfm_func(idct, idct, 32, sse2);
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itxfm_func(idct, idct, 32, ssse3);
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itxfm_func(iwht, iwht, 4, mmx);
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itxfm_func(iwht, iwht, 4, avx2);
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itxfm_funcs(16, avx2);
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itxfm_funcs(16, avx512icl);
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itxfm_func(idct, idct, 32, avx2);
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itxfm_func(idct, idct, 32, avx512icl);
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#undef itxfm_func
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#undef itxfm_funcs
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#define lpf_funcs(size1, size2, opt) \
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void ff_vp9_loop_filter_v_##size1##_##size2##_##opt(uint8_t *dst, ptrdiff_t stride, \
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int E, int I, int H); \
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void ff_vp9_loop_filter_h_##size1##_##size2##_##opt(uint8_t *dst, ptrdiff_t stride, \
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int E, int I, int H)
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lpf_funcs(4, 8, mmxext);
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lpf_funcs(8, 8, mmxext);
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lpf_funcs(16, 16, sse2);
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lpf_funcs(16, 16, ssse3);
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lpf_funcs(16, 16, avx);
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lpf_funcs(44, 16, sse2);
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lpf_funcs(44, 16, ssse3);
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lpf_funcs(44, 16, avx);
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lpf_funcs(84, 16, sse2);
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lpf_funcs(84, 16, ssse3);
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lpf_funcs(84, 16, avx);
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lpf_funcs(48, 16, sse2);
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lpf_funcs(48, 16, ssse3);
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lpf_funcs(48, 16, avx);
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lpf_funcs(88, 16, sse2);
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lpf_funcs(88, 16, ssse3);
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lpf_funcs(88, 16, avx);
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#undef lpf_funcs
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#define ipred_func(size, type, opt) \
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void ff_vp9_ipred_##type##_##size##x##size##_##opt(uint8_t *dst, ptrdiff_t stride, \
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const uint8_t *l, const uint8_t *a)
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ipred_func(4, hd, mmxext);
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ipred_func(4, vl, mmxext);
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ipred_func(8, v, mmx);
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#define ipred_dc_funcs(size, opt) \
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ipred_func(size, dc, opt); \
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ipred_func(size, dc_left, opt); \
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ipred_func(size, dc_top, opt)
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#define ipred_dir_tm_funcs(size, opt) \
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ipred_func(size, tm, opt); \
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ipred_func(size, dl, opt); \
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ipred_func(size, dr, opt); \
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ipred_func(size, hd, opt); \
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ipred_func(size, hu, opt); \
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ipred_func(size, vl, opt); \
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ipred_func(size, vr, opt)
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ipred_func(16, v, sse);
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ipred_func(32, v, sse);
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ipred_dc_funcs(16, sse2);
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ipred_dc_funcs(32, sse2);
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#define ipred_dir_tm_h_funcs(size, opt) \
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ipred_dir_tm_funcs(size, opt); \
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ipred_func(size, h, opt)
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ipred_dir_tm_h_funcs(8, sse2);
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ipred_dir_tm_h_funcs(16, sse2);
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ipred_dir_tm_h_funcs(32, sse2);
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ipred_func(4, h, sse2);
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#define ipred_all_funcs(size, opt) \
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ipred_dc_funcs(size, opt); \
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ipred_dir_tm_h_funcs(size, opt)
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// FIXME hd/vl_4x4_ssse3 does not exist
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ipred_all_funcs(4, ssse3);
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ipred_all_funcs(8, ssse3);
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ipred_all_funcs(16, ssse3);
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ipred_all_funcs(32, ssse3);
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ipred_dir_tm_h_funcs(8, avx);
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ipred_dir_tm_h_funcs(16, avx);
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ipred_dir_tm_h_funcs(32, avx);
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ipred_all_funcs(32, avx2);
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ipred_func(32, v, avx2);
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#undef ipred_func
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#undef ipred_dir_tm_h_funcs
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#undef ipred_dir_tm_funcs
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#undef ipred_dc_funcs
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av_cold void ff_vp9dsp_init_x86(VP9DSPContext *dsp, int bpp, int bitexact)
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{
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int cpu_flags;
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if (bpp == 10) {
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ff_vp9dsp_init_10bpp_x86(dsp, bitexact);
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return;
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} else if (bpp == 12) {
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ff_vp9dsp_init_12bpp_x86(dsp, bitexact);
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return;
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}
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cpu_flags = av_get_cpu_flags();
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#define init_lpf(opt) do { \
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dsp->loop_filter_16[0] = ff_vp9_loop_filter_h_16_16_##opt; \
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dsp->loop_filter_16[1] = ff_vp9_loop_filter_v_16_16_##opt; \
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dsp->loop_filter_mix2[0][0][0] = ff_vp9_loop_filter_h_44_16_##opt; \
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dsp->loop_filter_mix2[0][0][1] = ff_vp9_loop_filter_v_44_16_##opt; \
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dsp->loop_filter_mix2[0][1][0] = ff_vp9_loop_filter_h_48_16_##opt; \
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dsp->loop_filter_mix2[0][1][1] = ff_vp9_loop_filter_v_48_16_##opt; \
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dsp->loop_filter_mix2[1][0][0] = ff_vp9_loop_filter_h_84_16_##opt; \
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dsp->loop_filter_mix2[1][0][1] = ff_vp9_loop_filter_v_84_16_##opt; \
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dsp->loop_filter_mix2[1][1][0] = ff_vp9_loop_filter_h_88_16_##opt; \
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dsp->loop_filter_mix2[1][1][1] = ff_vp9_loop_filter_v_88_16_##opt; \
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} while (0)
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#define init_ipred(sz, opt, t, e) \
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dsp->intra_pred[TX_##sz##X##sz][e##_PRED] = ff_vp9_ipred_##t##_##sz##x##sz##_##opt
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#define ff_vp9_ipred_hd_4x4_ssse3 ff_vp9_ipred_hd_4x4_mmxext
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#define ff_vp9_ipred_vl_4x4_ssse3 ff_vp9_ipred_vl_4x4_mmxext
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#define init_dir_tm_ipred(sz, opt) do { \
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init_ipred(sz, opt, dl, DIAG_DOWN_LEFT); \
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init_ipred(sz, opt, dr, DIAG_DOWN_RIGHT); \
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init_ipred(sz, opt, hd, HOR_DOWN); \
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init_ipred(sz, opt, vl, VERT_LEFT); \
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init_ipred(sz, opt, hu, HOR_UP); \
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init_ipred(sz, opt, tm, TM_VP8); \
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init_ipred(sz, opt, vr, VERT_RIGHT); \
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} while (0)
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#define init_dir_tm_h_ipred(sz, opt) do { \
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init_dir_tm_ipred(sz, opt); \
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init_ipred(sz, opt, h, HOR); \
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} while (0)
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#define init_dc_ipred(sz, opt) do { \
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init_ipred(sz, opt, dc, DC); \
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init_ipred(sz, opt, dc_left, LEFT_DC); \
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init_ipred(sz, opt, dc_top, TOP_DC); \
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} while (0)
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#define init_all_ipred(sz, opt) do { \
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init_dc_ipred(sz, opt); \
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init_dir_tm_h_ipred(sz, opt); \
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} while (0)
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if (EXTERNAL_MMX(cpu_flags)) {
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init_fpel_func(4, 0, 4, put, , mmx);
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init_fpel_func(3, 0, 8, put, , mmx);
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if (!bitexact) {
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dsp->itxfm_add[4 /* lossless */][DCT_DCT] =
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dsp->itxfm_add[4 /* lossless */][ADST_DCT] =
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dsp->itxfm_add[4 /* lossless */][DCT_ADST] =
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dsp->itxfm_add[4 /* lossless */][ADST_ADST] = ff_vp9_iwht_iwht_4x4_add_mmx;
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}
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init_ipred(8, mmx, v, VERT);
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}
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if (EXTERNAL_MMXEXT(cpu_flags)) {
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dsp->loop_filter_8[0][0] = ff_vp9_loop_filter_h_4_8_mmxext;
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dsp->loop_filter_8[0][1] = ff_vp9_loop_filter_v_4_8_mmxext;
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dsp->loop_filter_8[1][0] = ff_vp9_loop_filter_h_8_8_mmxext;
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dsp->loop_filter_8[1][1] = ff_vp9_loop_filter_v_8_8_mmxext;
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init_fpel_func(4, 1, 4, avg, _8, mmxext);
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init_fpel_func(3, 1, 8, avg, _8, mmxext);
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dsp->intra_pred[TX_4X4][HOR_DOWN_PRED] = ff_vp9_ipred_hd_4x4_mmxext;
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dsp->intra_pred[TX_4X4][VERT_LEFT_PRED] = ff_vp9_ipred_vl_4x4_mmxext;
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}
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if (EXTERNAL_SSE(cpu_flags)) {
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init_fpel_func(2, 0, 16, put, , sse);
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init_fpel_func(1, 0, 32, put, , sse);
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init_fpel_func(0, 0, 64, put, , sse);
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init_ipred(16, sse, v, VERT);
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init_ipred(32, sse, v, VERT);
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}
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if (EXTERNAL_SSE2(cpu_flags)) {
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init_subpel3_8to64(0, put, 8, sse2);
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init_subpel3_8to64(1, avg, 8, sse2);
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init_fpel_func(2, 1, 16, avg, _8, sse2);
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init_fpel_func(1, 1, 32, avg, _8, sse2);
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init_fpel_func(0, 1, 64, avg, _8, sse2);
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init_lpf(sse2);
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dsp->itxfm_add[TX_4X4][ADST_DCT] = ff_vp9_idct_iadst_4x4_add_sse2;
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dsp->itxfm_add[TX_4X4][DCT_ADST] = ff_vp9_iadst_idct_4x4_add_sse2;
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dsp->itxfm_add[TX_4X4][ADST_ADST] = ff_vp9_iadst_iadst_4x4_add_sse2;
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dsp->itxfm_add[TX_8X8][DCT_DCT] = ff_vp9_idct_idct_8x8_add_sse2;
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dsp->itxfm_add[TX_8X8][ADST_DCT] = ff_vp9_idct_iadst_8x8_add_sse2;
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dsp->itxfm_add[TX_8X8][DCT_ADST] = ff_vp9_iadst_idct_8x8_add_sse2;
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dsp->itxfm_add[TX_8X8][ADST_ADST] = ff_vp9_iadst_iadst_8x8_add_sse2;
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dsp->itxfm_add[TX_16X16][DCT_DCT] = ff_vp9_idct_idct_16x16_add_sse2;
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dsp->itxfm_add[TX_16X16][ADST_DCT] = ff_vp9_idct_iadst_16x16_add_sse2;
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dsp->itxfm_add[TX_16X16][DCT_ADST] = ff_vp9_iadst_idct_16x16_add_sse2;
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dsp->itxfm_add[TX_16X16][ADST_ADST] = ff_vp9_iadst_iadst_16x16_add_sse2;
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dsp->itxfm_add[TX_32X32][ADST_ADST] =
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dsp->itxfm_add[TX_32X32][ADST_DCT] =
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dsp->itxfm_add[TX_32X32][DCT_ADST] =
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dsp->itxfm_add[TX_32X32][DCT_DCT] = ff_vp9_idct_idct_32x32_add_sse2;
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init_dc_ipred(16, sse2);
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init_dc_ipred(32, sse2);
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init_dir_tm_h_ipred(8, sse2);
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init_dir_tm_h_ipred(16, sse2);
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init_dir_tm_h_ipred(32, sse2);
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init_ipred(4, sse2, h, HOR);
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}
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if (EXTERNAL_SSSE3(cpu_flags)) {
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init_subpel3(0, put, 8, ssse3);
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init_subpel3(1, avg, 8, ssse3);
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dsp->itxfm_add[TX_4X4][DCT_DCT] = ff_vp9_idct_idct_4x4_add_ssse3;
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dsp->itxfm_add[TX_4X4][ADST_DCT] = ff_vp9_idct_iadst_4x4_add_ssse3;
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dsp->itxfm_add[TX_4X4][DCT_ADST] = ff_vp9_iadst_idct_4x4_add_ssse3;
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dsp->itxfm_add[TX_4X4][ADST_ADST] = ff_vp9_iadst_iadst_4x4_add_ssse3;
|
|
dsp->itxfm_add[TX_8X8][DCT_DCT] = ff_vp9_idct_idct_8x8_add_ssse3;
|
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dsp->itxfm_add[TX_8X8][ADST_DCT] = ff_vp9_idct_iadst_8x8_add_ssse3;
|
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dsp->itxfm_add[TX_8X8][DCT_ADST] = ff_vp9_iadst_idct_8x8_add_ssse3;
|
|
dsp->itxfm_add[TX_8X8][ADST_ADST] = ff_vp9_iadst_iadst_8x8_add_ssse3;
|
|
dsp->itxfm_add[TX_16X16][DCT_DCT] = ff_vp9_idct_idct_16x16_add_ssse3;
|
|
dsp->itxfm_add[TX_16X16][ADST_DCT] = ff_vp9_idct_iadst_16x16_add_ssse3;
|
|
dsp->itxfm_add[TX_16X16][DCT_ADST] = ff_vp9_iadst_idct_16x16_add_ssse3;
|
|
dsp->itxfm_add[TX_16X16][ADST_ADST] = ff_vp9_iadst_iadst_16x16_add_ssse3;
|
|
dsp->itxfm_add[TX_32X32][ADST_ADST] =
|
|
dsp->itxfm_add[TX_32X32][ADST_DCT] =
|
|
dsp->itxfm_add[TX_32X32][DCT_ADST] =
|
|
dsp->itxfm_add[TX_32X32][DCT_DCT] = ff_vp9_idct_idct_32x32_add_ssse3;
|
|
init_lpf(ssse3);
|
|
init_all_ipred(4, ssse3);
|
|
init_all_ipred(8, ssse3);
|
|
init_all_ipred(16, ssse3);
|
|
init_all_ipred(32, ssse3);
|
|
}
|
|
|
|
if (EXTERNAL_AVX(cpu_flags)) {
|
|
init_lpf(avx);
|
|
init_dir_tm_h_ipred(8, avx);
|
|
init_dir_tm_h_ipred(16, avx);
|
|
init_dir_tm_h_ipred(32, avx);
|
|
}
|
|
if (EXTERNAL_AVX_FAST(cpu_flags)) {
|
|
init_fpel_func(1, 0, 32, put, , avx);
|
|
init_fpel_func(0, 0, 64, put, , avx);
|
|
}
|
|
|
|
if (EXTERNAL_AVX2_FAST(cpu_flags)) {
|
|
init_fpel_func(1, 1, 32, avg, _8, avx2);
|
|
init_fpel_func(0, 1, 64, avg, _8, avx2);
|
|
if (ARCH_X86_64) {
|
|
#if ARCH_X86_64 && HAVE_AVX2_EXTERNAL
|
|
dsp->itxfm_add[4 /* lossless */][DCT_DCT] =
|
|
dsp->itxfm_add[4 /* lossless */][ADST_DCT] =
|
|
dsp->itxfm_add[4 /* lossless */][DCT_ADST] =
|
|
dsp->itxfm_add[4 /* lossless */][ADST_ADST] = ff_vp9_iwht_iwht_4x4_add_avx2;
|
|
dsp->itxfm_add[TX_4X4][DCT_DCT] = ff_vp9_idct_idct_4x4_add_avx2;
|
|
dsp->itxfm_add[TX_4X4][ADST_DCT] = ff_vp9_idct_iadst_4x4_add_avx2;
|
|
dsp->itxfm_add[TX_4X4][DCT_ADST] = ff_vp9_iadst_idct_4x4_add_avx2;
|
|
dsp->itxfm_add[TX_4X4][ADST_ADST] = ff_vp9_iadst_iadst_4x4_add_avx2;
|
|
dsp->itxfm_add[TX_8X8][DCT_DCT] = ff_vp9_idct_idct_8x8_add_avx2;
|
|
dsp->itxfm_add[TX_8X8][ADST_DCT] = ff_vp9_idct_iadst_8x8_add_avx2;
|
|
dsp->itxfm_add[TX_8X8][DCT_ADST] = ff_vp9_iadst_idct_8x8_add_avx2;
|
|
dsp->itxfm_add[TX_8X8][ADST_ADST] = ff_vp9_iadst_iadst_8x8_add_avx2;
|
|
dsp->itxfm_add[TX_16X16][DCT_DCT] = ff_vp9_idct_idct_16x16_add_avx2;
|
|
dsp->itxfm_add[TX_16X16][ADST_DCT] = ff_vp9_idct_iadst_16x16_add_avx2;
|
|
dsp->itxfm_add[TX_16X16][DCT_ADST] = ff_vp9_iadst_idct_16x16_add_avx2;
|
|
dsp->itxfm_add[TX_16X16][ADST_ADST] = ff_vp9_iadst_iadst_16x16_add_avx2;
|
|
dsp->itxfm_add[TX_32X32][ADST_ADST] =
|
|
dsp->itxfm_add[TX_32X32][ADST_DCT] =
|
|
dsp->itxfm_add[TX_32X32][DCT_ADST] =
|
|
dsp->itxfm_add[TX_32X32][DCT_DCT] = ff_vp9_idct_idct_32x32_add_avx2;
|
|
init_subpel3_32_64(0, put, 8, avx2);
|
|
init_subpel3_32_64(1, avg, 8, avx2);
|
|
#endif
|
|
}
|
|
init_all_ipred(32, avx2);
|
|
init_ipred(32, avx2, v, VERT);
|
|
}
|
|
|
|
#if ARCH_X86_64
|
|
if (EXTERNAL_AVX512ICL(cpu_flags)) {
|
|
dsp->itxfm_add[TX_16X16][DCT_DCT] = ff_vp9_idct_idct_16x16_add_avx512icl;
|
|
dsp->itxfm_add[TX_16X16][ADST_DCT] = ff_vp9_idct_iadst_16x16_add_avx512icl;
|
|
dsp->itxfm_add[TX_16X16][DCT_ADST] = ff_vp9_iadst_idct_16x16_add_avx512icl;
|
|
dsp->itxfm_add[TX_16X16][ADST_ADST] = ff_vp9_iadst_iadst_16x16_add_avx512icl;
|
|
dsp->itxfm_add[TX_32X32][ADST_ADST] =
|
|
dsp->itxfm_add[TX_32X32][ADST_DCT] =
|
|
dsp->itxfm_add[TX_32X32][DCT_ADST] =
|
|
dsp->itxfm_add[TX_32X32][DCT_DCT] = ff_vp9_idct_idct_32x32_add_avx512icl;
|
|
init_subpel_asm(4, 4, 8, avx512icl);
|
|
init_subpel_asm(3, 8, 8, avx512icl);
|
|
init_subpel_asm(2, 16, 8, avx512icl);
|
|
init_subpel_asm(1, 32, 8, avx512icl);
|
|
init_subpel_asm(0, 64, 8, avx512icl);
|
|
}
|
|
#endif
|
|
|
|
#undef init_fpel
|
|
#undef init_subpel1
|
|
#undef init_subpel2
|
|
#undef init_subpel3
|
|
}
|